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Message-ID:
<DU0PR09MB619646561DF9B4F262F8B2B7F6BA2@DU0PR09MB6196.eurprd09.prod.outlook.com>
Date: Wed, 23 Apr 2025 12:14:26 +0000
From: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
To: "linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>
CC: Djordje Todorovic <djordje.todorovic@...cgroup.com>, Palmer Dabbelt
<palmer@...belt.com>, Conor Dooley <conor@...nel.org>, Aleksandar Rikalo
<arikalo@...il.com>, Paul Walmsley <paul.walmsley@...ive.com>, Albert Ou
<aou@...s.berkeley.edu>, Daniel Lezcano <daniel.lezcano@...aro.org>, Thomas
Gleixner <tglx@...utronix.de>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, "devicetree@...r.kernel.org"
<devicetree@...r.kernel.org>
Subject: [PATCH v3 1/2] dt-bindings: timer: mti,gcru
HTEC Public
Add dt-bindings for the GCR.U memory mapped timer device for RISC-V
platforms. The GCR.U memory region contains shadow copies of the RISC-V
mtime register and the hrtime Global Configuration Register.
Signed-off-by: Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
---
.../devicetree/bindings/timer/mti,gcru.yaml | 47 +++++++++++++++++++
1 file changed, 47 insertions(+)
create mode 100644 Documentation/devicetree/bindings/timer/mti,gcru.yaml
diff --git a/Documentation/devicetree/bindings/timer/mti,gcru.yaml b/Documentation/devicetree/bindings/timer/mti,gcru.yaml
new file mode 100644
index 000000000000..6555dbab402e
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/mti,gcru.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/mti,gcru.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: GCR.U timer device for RISC-V platforms
+
+maintainers:
+ - Aleksa Paunovic <aleksa.paunovic@...cgroup.com>
+
+description:
+ The GCR.U memory region contains memory mapped shadow copies of
+ mtime and hrtime Global Configuration Registers,
+ which software can choose to make accessible from user mode.
+
+select:
+ properties:
+ compatible:
+ contains:
+ const: mti,gcru
+
+ required:
+ - compatible
+
+properties:
+ compatible:
+ const: mti,gcru
+
+ reg:
+ items:
+ - description: Read-only shadow copy of the RISC-V mtime register.
+ - description: Read-only shadow copy of the high resolution timer register.
+
+required:
+ - compatible
+ - reg
+
+additionalProperties: false
+
+examples:
+ - |
+ gcru: timer@...7F000 {
+ compatible = "mti,gcru";
+ reg = <0x1617F050 0x8>,
+ <0x1617F090 0x8>;
+ };
--
2.34.1
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