linux-kernel - [PATCH v6 2/6] cdx: Add DDRMC Commands for DDR Configuration Retrieval

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Message-ID: <20250424132118.17074-3-shubhrajyoti.datta@amd.com>
Date: Thu, 24 Apr 2025 18:51:14 +0530
From: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
To: <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
	<linux-edac@...r.kernel.org>
CC: <git@....com>, <ptsm@...ux.microsoft.com>, <srivatsa@...il.mit.edu>,
	<shubhrajyoti.datta@...il.com>, Krzysztof Kozlowski <krzk@...nel.org>, "Rob
 Herring" <robh@...nel.org>, Conor Dooley <conor+dt@...nel.org>, "Borislav
 Petkov" <bp@...en8.de>, Tony Luck <tony.luck@...el.com>, James Morse
	<james.morse@....com>, Mauro Carvalho Chehab <mchehab@...nel.org>, "Robert
 Richter" <rric@...nel.org>, Shubhrajyoti Datta <shubhrajyoti.datta@....com>
Subject: [PATCH v6 2/6] cdx: Add DDRMC Commands for DDR Configuration Retrieval

Introduce new MC commands for retrieving DDRMC (DDR Memory Controller)
configuration details.
These commands allow querying the DDR controller's
configuration, including:

-The number of configuration registers
-Register values for the specified DDR controller index

This functionality is needed for the VersalNet EDAC.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@....com>
---

Changes in v6:
 - Updated commit message

 include/linux/mc_cdx_pcol.h | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/include/linux/mc_cdx_pcol.h b/include/linux/mc_cdx_pcol.h
index 832a44af963e..174270e148f3 100644
--- a/include/linux/mc_cdx_pcol.h
+++ b/include/linux/mc_cdx_pcol.h
@@ -302,6 +302,12 @@
 #define MC_CMD_CDX_BUS_ENUM_DEVICES_OUT_DEVICE_COUNT_OFST	0
 #define MC_CMD_CDX_BUS_ENUM_DEVICES_OUT_DEVICE_COUNT_LEN	4
 
+/* Number of registers */
+#define MC_CMD_EDAC_GET_DDR_CONFIG_OUT_WORD_LENGTH_OFST		0
+#define MC_CMD_EDAC_GET_DDR_CONFIG_OUT_WORD_LENGTH_LEN		4
+/* Number of registers for the DDR controller */
+#define MC_CMD_EDAC_GET_DDR_CONFIG_OUT_REGISTER_VALUES_OFST	4
+#define MC_CMD_EDAC_GET_DDR_CONFIG_OUT_REGISTER_VALUES_LEN	4
 /***********************************/
 /*
  * MC_CMD_CDX_BUS_GET_DEVICE_CONFIG
@@ -587,6 +593,16 @@
 /* MC_CMD_CDX_DEVICE_CONTROL_SET_OUT msgresponse */
 #define MC_CMD_CDX_DEVICE_CONTROL_SET_OUT_LEN				0
 
+/***********************************/
+/* MC_CMD_EDAC_GET_DDR_CONFIG
+ * Provides detailed configuration for the DDR controller of the given index.
+ */
+#define MC_CMD_EDAC_GET_DDR_CONFIG 0x3
+
+/* MC_CMD_EDAC_GET_DDR_CONFIG_IN msgrequest */
+#define MC_CMD_EDAC_GET_DDR_CONFIG_IN_CONTROLLER_INDEX_OFST		0
+#define MC_CMD_EDAC_GET_DDR_CONFIG_IN_CONTROLLER_INDEX_LEN		4
+
 /***********************************/
 /*
  * MC_CMD_CDX_DEVICE_CONTROL_GET
-- 
2.17.1