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Message-ID: <20250424154722.534284-1-ivecera@redhat.com>
Date: Thu, 24 Apr 2025 17:47:14 +0200
From: Ivan Vecera <ivecera@...hat.com>
To: netdev@...r.kernel.org
Cc: Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
Jiri Pirko <jiri@...nulli.us>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Prathosh Satish <Prathosh.Satish@...rochip.com>,
Lee Jones <lee@...nel.org>,
Kees Cook <kees@...nel.org>,
Andy Shevchenko <andy@...nel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Michal Schmidt <mschmidt@...hat.com>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
linux-hardening@...r.kernel.org
Subject: [PATCH net-next v4 0/8] Add Microchip ZL3073x support (part 1)
Add support for Microchip Azurite DPLL/PTP/SyncE chip family that
provides DPLL and PTP functionality. This series bring first part
that adds the common MFD driver that provides an access to the bus
that can be either I2C or SPI.
The next part of the series is bringing the DPLL driver that will
covers DPLL functionality. Another series will bring PTP driver and
flashing capability via devlink in the MFD driver will follow soon.
Testing was done by myself and by Prathosh Satish on Microchip EDS2
development board with ZL30732 DPLL chip connected over I2C bus.
Patch breakdown
===============
Patch 1 - Common DT schema for DPLL device and pin
Patch 2 - DT bindings for microchip,zl3073* devices
Patch 3 - Basic support for I2C, SPI and regmap configuration
Patch 4 - Devlink device registration and info
Patch 5 - Helpers for reading and writing register mailboxes
Patch 6 - Fetch invariant register values used by DPLL/PTP sub-drivers
Patch 7 - Clock ID generation for DPLL driver
Patch 8 - Register/create DPLL device cells
---
v3->v4:
* fixed shortcomings in DT patches
* completely reworked register access
* removed a need to manage locking during mailbox accesses by callers
* regcache switched to maple
* dev_err_probe() in probe path
* static mfd cells during sub-devices registration
v1->v3:
* dropped macros for generating register access functions
* register access functions are provided in <linux/mfd/zl3073x_regs.h>
* fixed DT descriptions and compatible wildcard usage
* reworked regmap locking
- regmap uses implicit locking
- mailbox registers are additionally protected by extra mutex
* fixed regmap virtual address range
* added regmap rbtree cache (only for page selector now)
* dropped patches for exporting strnchrnul and for supporting mfg file
this will be maybe added later
Ivan Vecera (8):
dt-bindings: dpll: Add DPLL device and pin
dt-bindings: dpll: Add support for Microchip Azurite chip family
mfd: Add Microchip ZL3073x support
mfd: zl3073x: Add support for devlink device info
mfd: zl3073x: Add functions to work with register mailboxes
mfd: zl3073x: Fetch invariants during probe
mfd: zl3073x: Add clock_id field
mfd: zl3073x: Register DPLL sub-device during init
.../devicetree/bindings/dpll/dpll-device.yaml | 76 ++
.../devicetree/bindings/dpll/dpll-pin.yaml | 45 +
.../bindings/dpll/microchip,zl30731.yaml | 115 ++
MAINTAINERS | 11 +
drivers/mfd/Kconfig | 32 +
drivers/mfd/Makefile | 5 +
drivers/mfd/zl3073x-core.c | 1011 +++++++++++++++++
drivers/mfd/zl3073x-i2c.c | 68 ++
drivers/mfd/zl3073x-regs.h | 155 +++
drivers/mfd/zl3073x-spi.c | 68 ++
drivers/mfd/zl3073x.h | 31 +
include/linux/mfd/zl3073x.h | 308 +++++
12 files changed, 1925 insertions(+)
create mode 100644 Documentation/devicetree/bindings/dpll/dpll-device.yaml
create mode 100644 Documentation/devicetree/bindings/dpll/dpll-pin.yaml
create mode 100644 Documentation/devicetree/bindings/dpll/microchip,zl30731.yaml
create mode 100644 drivers/mfd/zl3073x-core.c
create mode 100644 drivers/mfd/zl3073x-i2c.c
create mode 100644 drivers/mfd/zl3073x-regs.h
create mode 100644 drivers/mfd/zl3073x-spi.c
create mode 100644 drivers/mfd/zl3073x.h
create mode 100644 include/linux/mfd/zl3073x.h
--
2.49.0
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