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Message-ID: <01bb7183-eb33-4b9b-b73a-e7e3622bf9dd@oss.qualcomm.com>
Date: Thu, 24 Apr 2025 22:32:44 +0200
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Mao Jinlong <quic_jinlmao@...cinc.com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach
<mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>
Cc: coresight@...ts.linaro.org, linux-arm-kernel@...ts.infradead.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 4/5] coresight: Add remote etm support
On 4/24/25 1:58 PM, Mao Jinlong wrote:
> The system on chip (SoC) consists of main APSS(Applications
> processor subsytem) and additional processors like modem, lpass.
> Coresight remote etm(Embedded Trace Macrocell) driver is for
> enabling and disabling the etm trace of remote processors. It
> uses QMI interface to communicate with remote processors' software
> and uses coresight framework to configure the connection from
> remote etm source to TMC sinks.
>
> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
> ---
[...]
> +/*
> + * Element info to descrbe the coresight_set_etm_req_msg_v01 struct
> + * which is used to encode the request.
> + */
> +static struct qmi_elem_info coresight_set_etm_req_msg_v01_ei[] = {
> + {
> + .data_type = QMI_UNSIGNED_4_BYTE,
There's one tab too many here and in other declarations (make sure your
tab width is set to 8 spaces)
I'll try to read into the actual code a bit later
Konrad
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