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Message-ID: <20250424-f322adab22126ae97dd7c5b4@orel>
Date: Thu, 24 Apr 2025 10:45:46 +0200
From: Andrew Jones <ajones@...tanamicro.com>
To: Alexandre Ghiti <alexghiti@...osinc.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>, Alexandre Ghiti <alex@...ti.fr>,
Anup Patel <anup@...infault.org>, Atish Patra <atishp@...shpatra.org>,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org, kvm@...r.kernel.org,
kvm-riscv@...ts.infradead.org
Subject: Re: [PATCH 2/3] riscv: Strengthen duplicate and inconsistent
definition of RV_X()
On Tue, Apr 22, 2025 at 10:25:44AM +0200, Alexandre Ghiti wrote:
> RV_X() macro is defined in two different ways which is error prone.
>
> So harmonize its first definition and add another macro RV_X_mask() for
> the second one.
>
> Signed-off-by: Alexandre Ghiti <alexghiti@...osinc.com>
> ---
> arch/riscv/include/asm/insn.h | 39 ++++++++++++++--------------
> arch/riscv/kernel/elf_kexec.c | 1 -
> arch/riscv/kernel/traps_misaligned.c | 1 -
> arch/riscv/kvm/vcpu_insn.c | 1 -
> 4 files changed, 20 insertions(+), 22 deletions(-)
>
> diff --git a/arch/riscv/include/asm/insn.h b/arch/riscv/include/asm/insn.h
> index 2a589a58b291..4063ca35be9b 100644
> --- a/arch/riscv/include/asm/insn.h
> +++ b/arch/riscv/include/asm/insn.h
> @@ -288,43 +288,44 @@ static __always_inline bool riscv_insn_is_c_jalr(u32 code)
>
> #define RV_IMM_SIGN(x) (-(((x) >> 31) & 1))
> #define RVC_IMM_SIGN(x) (-(((x) >> 12) & 1))
> -#define RV_X(X, s, mask) (((X) >> (s)) & (mask))
> -#define RVC_X(X, s, mask) RV_X(X, s, mask)
> +#define RV_X(X, s, n) (((X) >> (s)) & ((1 << (n)) - 1))
Assuming n is arbitrary then we should be using BIT_ULL.
Thanks,
drew
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