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Message-ID: <250f8ff8-8576-4280-a9aa-9939090b4d31@arm.com>
Date: Thu, 24 Apr 2025 10:25:49 +0100
From: James Morse <james.morse@....com>
To: Reinette Chatre <reinette.chatre@...el.com>, x86@...nel.org,
linux-kernel@...r.kernel.org
Cc: Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>,
Borislav Petkov <bp@...en8.de>, H Peter Anvin <hpa@...or.com>,
Babu Moger <Babu.Moger@....com>, shameerali.kolothum.thodi@...wei.com,
D Scott Phillips OS <scott@...amperecomputing.com>,
carl@...amperecomputing.com, lcherian@...vell.com,
bobo.shaobowang@...wei.com, tan.shaopeng@...itsu.com,
baolin.wang@...ux.alibaba.com, Jamie Iles <quic_jiles@...cinc.com>,
Xin Hao <xhao@...ux.alibaba.com>, peternewman@...gle.com,
dfustini@...libre.com, amitsinght@...vell.com,
David Hildenbrand <david@...hat.com>, Rex Nie <rex.nie@...uarmicro.com>,
Dave Martin <dave.martin@....com>, Koba Ko <kobak@...dia.com>,
Shanker Donthineni <sdonthineni@...dia.com>, fenghuay@...dia.com,
Shaopeng Tan <tan.shaopeng@...fujitsu.com>, Tony Luck <tony.luck@...el.com>
Subject: Re: [PATCH v8 12/21] x86/resctrl: Move the filesystem bits to headers
visible to fs/resctrl
Hi Reinette,
On 17/04/2025 23:46, Reinette Chatre wrote:
>> diff --git a/arch/x86/include/asm/resctrl.h b/arch/x86/include/asm/resctrl.h
>> index 7a39728b0743..6eb7d5c94c7a 100644
>> --- a/arch/x86/include/asm/resctrl.h
>> +++ b/arch/x86/include/asm/resctrl.h
>> @@ -210,6 +210,9 @@ int resctrl_arch_measure_l2_residency(void *_plr);
>> int resctrl_arch_measure_l3_residency(void *_plr);
>> void resctrl_cpu_detect(struct cpuinfo_x86 *c);
>>
>> +bool resctrl_arch_get_cdp_enabled(enum resctrl_res_level l);
>> +int resctrl_arch_set_cdp_enabled(enum resctrl_res_level l, bool enable);
> I noticed this while reading through the telemetry work ... the custom
> appears to be for all arch helpers to be declared in include/linux/resctrl.h
> making these two stand out. What motivated their inclusion into
> arch/x86/include/asm/resctrl.h?
Doing some archaeology ... it looks like this dates from the era when MPAM had stub
versions of these because it didn't support/emulate CDP. Having these in the arch code's
header meant the static-inline stubs could be inlined into resctrl. x86 has an inline
version before this patch, but I moved it out of line to avoid exposing the array of all
resources. (which in turn would suggest changing the name, which isn't worth the churn)
I was assuming only x86 would ever support CDP, but since then, emulating CDP using the
separate I/D PARTID values MPAM has proved feasible.
I'll move them.
> If they move to include/linux/resctrl.h it looks like enum resctrl_res_level is
> no longer required to be in include/linux/resctrl_types.h.
Yes. I'll add a patch move it, but it feels like churn.
> Looking further, from commit f16adbaf9272 ("x86/resctrl: Move resctrl types to a separate header")
> the motivation for including enum resctrl_event_id is to support
> resctrl_arch_mon_ctx_alloc() and resctrl_arch_mon_ctx_free(), but looking
> at their definitions in arch/x86/include/asm/resctrl.h they are using "int evtid"
> instead of enum resctrl_event_id. Looks like their definitions need to
> change?
Bother. The MPAM definition of those has the enum type, I'd missed that the x86 stub
swallowed the type. I'll fix that.
> I assume the pseudo-locking arch helpers are placed in arch/x86/include/asm/resctrl.h
> with the implicit knowledge that only x86 will set CONFIG_RESCTRL_FS_PSEUDO_LOCK so
> avoiding that extra handling in include/linux/resctrl.h?
Given how specific that is to x86, I think it will only ever be enabled there.
For arm, things like the prefetcher can't be disabled by linux. I would assume risc-v is
structurally the same.
Those definitions went into the arch header so that some architectures could inline the
stubs to let the compiler remove code that will never run.
I guess these could be defined both ways round in linux/resctrl.h depending on the Kconfig
symbol. At this point its churn, but this saves a third architecture having to define the
same list of stubs. (I reckon that is likely for risc-v).
Thanks,
James
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