| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20250424-qcs615-mm-v7-clock-controllers-v8-0-bacad5b3659a@quicinc.com>
Date: Thu, 24 Apr 2025 15:02:55 +0530
From: Taniya Das <quic_tdas@...cinc.com>
To: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette
<mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon
<will@...nel.org>
CC: Ajit Pandey <quic_ajipan@...cinc.com>,
Imran Shaik
<quic_imrashai@...cinc.com>,
Jagadeesh Kona <quic_jkona@...cinc.com>,
<linux-arm-msm@...r.kernel.org>, <linux-clk@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
Taniya Das <quic_tdas@...cinc.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Dmitry Baryshkov
<lumag@...nel.org>
Subject: [PATCH v8 00/10] Add support for videocc, camcc, dispcc and gpucc
on Qualcomm QCS615 platform
Add support for multimedia clock controllers on Qualcomm QCS615 platform.
Update the defconfig to enable these clock controllers.
Global clock controller support
https://lore.kernel.org/all/20241022-qcs615-clock-driver-v4-0-3d716ad0d987@quicinc.com/
Changes in v8:
- Drop the properties which are already covered as part of gcc.yaml [Krzysztof]
- Drop the RB tag for dt-bindings for Camera clock controller.
- Link to v7: https://lore.kernel.org/r/20250414-qcs615-mm-v7-clock-controllers-v7-0-ebab8e3a96e9@quicinc.com
Changes in v7:
- Update DT bindings for CAMCC, DISPCC, VIDEOCC, GPUCC to remove the
common bindings and add reference to "qcom,gcc.yaml" [Krzysztof]
- Fix the following in the alpha pll code [Bjorn]
- double space removal in clk_alpha_pll_slew_set_rate
- fix the alpha_width from dynamic to 'ALPHA_REG_BITWIDTH'
- cleanup the programming of lower/upper_32_bits of 'alpha'
- update the comment for 'mb()'
- Link to v6: https://lore.kernel.org/all/20250313-qcs615-v5-mm-cc-v6-1-ebf4b9a5e916@quicinc.com/
Changes in v6:
- Remove wrongly RB-By tags which got introduced in v4 and was carried
to v5 as well.
- Adding the reference where the tags were added and dropped.
-[01/10] clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs
- RB-By from Imran (v2)
-[02/10] dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller
- RB-By from Krzysztof (v2), drop wrong RB-By from Dmitry (v5)
-[03/10] clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver
- R-By from Bryan (v2)
-[04/10] dt-bindings: clock: Add Qualcomm QCS615 Display clock controller
- Drop wrong RB-By from Dmitry (v5)
-[05/10] clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver
- R-By from Dmitry (v1)
-[06/10] dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller
- Drop wrong RB-By from Dmitry(v5)
-[07/10] clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver
- R-By from Dmitry (v1)
-[08/10] dt-bindings: clock: Add Qualcomm QCS615 Video clock controller
- Drop wrong RB-By from Dmitry(v5)
-[09/10] clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver
- R-By from Dmitry and Bryan (v3)
-[10/10] arm64: defconfig: Enable QCS615 clock controllers
- Drop wrong RB-By from Dmitry (v5)
- Link to v5: https://lore.kernel.org/r/20250221-qcs615-v5-mm-cc-v5-0-b6d9ddf2f28d@quicinc.com
Changes in v5:
- Update ARM64 || COMPILE_TEST in all Kconfig to resolve kismet warnings.
- Fix sparse errors in GPUCC.
- Link to v4: https://lore.kernel.org/r/20250119-qcs615-mm-v4-clockcontroller-v4-0-5d1bdb5a140c@quicinc.com
Changes in v4:
- Drop patch Update the support for alpha mode configuration as this
patch was picked - https://lore.kernel.org/all/20241021-fix-alpha-mode-config-v1-1-f32c254e02bc@gmail.com/
- Update the bindings to include "qcom,gcc.yaml" [Dmitry]
Changes in v3:
- update PLL configs to use BIT and GENMASK for vco_val and vco_mask for all CCs [Bryan O'Donoghue]
- Link to v2: https://lore.kernel.org/r/20241101-qcs615-mm-clockcontroller-v2-0-d1a4870a4aed@quicinc.com
Changes in v2:
- cleanups in clk_alpha_pll_slew_update and clk_alpha_pll_slew_enable functions [Christophe]
- update PLL configs for "vco_val = 0x0" shift(20) [Bryan O'Donoghue]
- update PLL configs to use lower case for L value [Dmitry]
- Link parents for IFE/IPE/BPS GDSCs as Titan Top GDSC [Bryan O'Donoghue, Dmitry]
- Remove DT_BI_TCXO_AO from camcc-qcs615 [Dmitry]
- Remove HW_CTRL_TRIGGER from camcc-qcs615 [Bryan O'Donoghue]
- Update platform name for default configuration [Dmitry]
- Link to v1: https://lore.kernel.org/r/20241019-qcs615-mm-clockcontroller-v1-0-4cfb96d779ae@quicinc.com
Signed-off-by: Taniya Das <quic_tdas@...cinc.com>
---
Taniya Das (10):
clk: qcom: clk-alpha-pll: Add support for dynamic update for slewing PLLs
dt-bindings: clock: Add Qualcomm QCS615 Camera clock controller
clk: qcom: camcc-qcs615: Add QCS615 camera clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Display clock controller
clk: qcom: dispcc-qcs615: Add QCS615 display clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Graphics clock controller
clk: qcom: gpucc-qcs615: Add QCS615 graphics clock controller driver
dt-bindings: clock: Add Qualcomm QCS615 Video clock controller
clk: qcom: videocc-qcs615: Add QCS615 video clock controller driver
arm64: defconfig: Enable QCS615 clock controllers
.../bindings/clock/qcom,qcs615-camcc.yaml | 43 +
.../bindings/clock/qcom,qcs615-dispcc.yaml | 55 +
.../bindings/clock/qcom,qcs615-gpucc.yaml | 49 +
.../bindings/clock/qcom,qcs615-videocc.yaml | 47 +
arch/arm64/configs/defconfig | 4 +
drivers/clk/qcom/Kconfig | 35 +
drivers/clk/qcom/Makefile | 4 +
drivers/clk/qcom/camcc-qcs615.c | 1591 ++++++++++++++++++++
drivers/clk/qcom/clk-alpha-pll.c | 170 +++
drivers/clk/qcom/clk-alpha-pll.h | 1 +
drivers/clk/qcom/dispcc-qcs615.c | 786 ++++++++++
drivers/clk/qcom/gpucc-qcs615.c | 525 +++++++
drivers/clk/qcom/videocc-qcs615.c | 332 ++++
include/dt-bindings/clock/qcom,qcs615-camcc.h | 110 ++
include/dt-bindings/clock/qcom,qcs615-dispcc.h | 52 +
include/dt-bindings/clock/qcom,qcs615-gpucc.h | 39 +
include/dt-bindings/clock/qcom,qcs615-videocc.h | 30 +
17 files changed, 3873 insertions(+)
---
base-commit: 01c6df60d5d4ae00cd5c1648818744838bba7763
change-id: 20250414-qcs615-mm-v7-clock-controllers-29b3833b491f
Best regards,
--
Taniya Das <quic_tdas@...cinc.com>
Powered by blists - more mailing lists