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Message-ID: <1c9acb0c-50ae-4343-8deb-c5d04e75ca2a@linux.intel.com>
Date: Fri, 25 Apr 2025 09:54:18 -0400
From: "Liang, Kan" <kan.liang@...ux.intel.com>
To: Peter Zijlstra <peterz@...radead.org>
Cc: mingo@...hat.com, acme@...nel.org, namhyung@...nel.org,
 irogers@...gle.com, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 0/5] Several fixes for group flag and
 counters-snapshotting



On 2025-04-25 8:55 a.m., Peter Zijlstra wrote:
> On Thu, Apr 24, 2025 at 12:00:02PM -0400, Liang, Kan wrote:
>>
>>
>> On 2025-04-24 10:25 a.m., Peter Zijlstra wrote:
>>> On Thu, Apr 24, 2025 at 06:47:13AM -0700, kan.liang@...ux.intel.com wrote:
>>>> From: Kan Liang <kan.liang@...ux.intel.com>
>>>>
>>>> The patch series includes several fixes for the new Intel features.
>>>>
>>>> The first 4 patches are to fix the group flag issue which impacts the
>>>> branch counters, PEBS counters-snapshotting and ACR.
>>>> The V1 can be found at
>>>> https://lore.kernel.org/lkml/20250423221015.268949-1-kan.liang@linux.intel.com/
>>>>
>>>> The last patch is to fix an issue of counters-snapshotting.
>>>> The V1 can be found at
>>>> https://lore.kernel.org/lkml/20250204210514.4089680-1-kan.liang@linux.intel.com/
>>>>
>>>> Kan Liang (5):
>>>>   perf/x86/intel: Only check the group flag for X86 leader
>>>>   perf/x86/intel: Check the X86 leader for pebs_counter_event_group
>>>>   perf/x86/intel: Check the X86 leader for ACR group
>>>>   perf/x86: Optimize the is_x86_event
>>>>   perf/x86/intel/ds: Fix counter backwards of non-precise events
>>>>     counters-snapshotting
>>>
>>> It didn't apply cleanly,
>>
>> Sorry for it.
>>
>>> but I stomped on it and pushed out new
>>> perf/urgent and perf/core branches that contain these patches. Hopefully
>>> I didn't mess it up ;-)
>>
>> Something is missed in this patch 5d4d71ebc737 ("perf/x86/intel: Only
>> check the group flag for X86 leader")
>>
>> diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
>> index a73b1ff031b2..1f72a4f77b5c 100644
>> --- a/arch/x86/events/perf_event.h
>> +++ b/arch/x86/events/perf_event.h
>> @@ -119,7 +119,7 @@ static inline bool check_leader_group(struct
>> perf_event *leader, int flags)
>>
>>  static inline bool is_branch_counters_group(struct perf_event *event)
>>  {
>> -	return check_leader_group(event->group_leader, PERF_X86_EVENT_PEBS_CNTR);
>> +	return check_leader_group(event->group_leader,
>> PERF_X86_EVENT_BRANCH_COUNTERS);
>>  }
>>
>>  static inline bool is_pebs_counter_event_group(struct perf_event *event)
> 
> Right.
> 
>> @@ -1123,7 +1123,6 @@ static struct perf_pmu_format_hybrid_attr
>> format_attr_hybrid_##_name = {\
>>  	.pmu_type	= _pmu,                                         \
>>  }
>>
>> -int is_x86_event(struct perf_event *event);
>>  struct pmu *x86_get_pmu(unsigned int cpu);
>>  extern struct x86_pmu x86_pmu __read_mostly;
> 
> See, that isn't there in tip/perf/urgent :-)
> >
> I've pushed out an updated set. Please check.

It looks good to me. Thanks a lot! :)

Kan

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