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Message-ID: <20250425151150.GH24730@pendragon.ideasonboard.com>
Date: Fri, 25 Apr 2025 18:11:50 +0300
From: Laurent Pinchart <laurent.pinchart@...asonboard.com>
To: Adam Ford <aford173@...il.com>
Cc: Mauro Carvalho Chehab <mchehab@...nel.org>,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
linux-media <linux-media@...r.kernel.org>, imx@...ts.linux.dev,
arm-soc <linux-arm-kernel@...ts.infradead.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Peng Fan <peng.fan@....com>, Frank Li <Frank.Li@....com>
Subject: Re: i.MX8M Nano ISI Channel Question
Hi Adam,
On Fri, Apr 25, 2025 at 07:36:52AM -0500, Adam Ford wrote:
> On Fri, Apr 25, 2025 at 7:14 AM Laurent Pinchart wrote:
> > On Thu, Apr 24, 2025 at 08:59:18PM -0500, Adam Ford wrote:
> > > NXP-
> > >
> > > I am trying use Libcamera to capture video on an i.MX8M Nano.
> > > (Hopefully, this makes Laurent smile)
> > >
> > > I noticed that it has a maximum capture of 1080 lines when I query it
> > > with Libcamera, but the same camera on the Mini can capture at higher
> > > rates. The multimedia overview states it can handle 1 unprocessed
> > > camera stream at 4kp30 without scaling. The Nano's Ref manual later
> > > states that each processing channel has one line buffer, and each line
> > > buffer can store up to 2048 pixels. It continues to describe when
> > > processing higher resolution images like 4k, the line buffer from
> > > other channels can be combined.
> > >
> > > Section 13.4.3.5 of the Nano's Ref manual (Rev 2, dated 07/2022)
> > > explicitly goes into detail on how to capture up to 4k image
> > > resolution by combining channel 'n' with channel 'n+1' which implies
> > > there are at least two channels.
> > >
> > > Section 13.4.5.1 states the registers are dedicated for each channel
> > > and spaced 64KB apart, but then the following table only shows the
> > > base address for one, and Table 2-6 shows the ISI size is 64KB.
> > >
> > > The driver is currently written to only support 1 channel. When
> > > reading through the driver, it appears to require one IRQ per channel,
> > > so I looked through the Nano's IRQ table (7-1), and found there are
> > > three:
> > > ISI Camera Channel 0 Interrupt - 16
> > > ISI Camera Channel 1 Interrupt - 42
> > > ISI Camera Channel 2 Interrupt - 43
> > >
> > > I attempted to enable a second channel by modifying the .num_channels
> > > = 2 value in the driver, and I modified my device tree to assign a
> > > second IRQ (42), but when I query the pipeline with libcamera, it
> > > still doesn't show an available resolution ov 2592x1944 that is
> > > supported by the camera and work on the Mini without the ISI system.
> > >
> > > Can someone tell me how many channels are actually available, and
> > > whether or not 4Kp30 video is really available on the Nano?
> >
> > My understanding, based on the i.MX8MN reference manual, is that the ISI
> > has a single channel. The ISI features list (13.4.1.2) reports
> >
> > • Supports up to 2K resolution at 30 or 60 fps (24bpp) on each channel.
>
> I saw that which is why I was really confused when they listed 4K in
> other section.
>
> > If you look at the i.MX8MP reference manual, the same features list
> > reports
> >
> > • Supports one source of 4K resolution at 30 fps (24bpp).
> > • Supports up to 2K resolution at 30 or 60 fps (24bpp) on each channel.
>
> I didn't look there, but that makes sense.
>
> > There's no mention of 4K in the i.MX8MN ISI features. I expect that the
> > documentation about 4K support by combining pixel buffers comes from the
> > generic ISI documentation, and is not applicable to the i.MX8MN.
>
> I suspect you're right, but the documentation is very confusing. If
> that's true, maybe Frank can get the NXP people to remove the
> references to the 4K capture from future documents.
>
> Any idea is the CSI on Nano is really capable of 4-channel virtual
> channels as listed in section "13.5.1.2 Features" because I believe
> it's the same, or similar CSI as what is in 8M Plus and Mini, and I
> don't think those are capable of virtual channels.
That part isn't entirely clear to me. The integration of the CSI-2
receiver in various i.MX8 SoCs is not well documented, so we rely on
lots of guesswork.
--
Regards,
Laurent Pinchart
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