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Message-ID: <7f1df90b-7b6d-4f39-838a-60adc3ceb043@quicinc.com>
Date: Fri, 25 Apr 2025 13:18:35 -0700
From: Jessica Zhang <quic_jesszhan@...cinc.com>
To: Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov
<dmitry.baryshkov@....qualcomm.com>
CC: Dmitry Baryshkov <lumag@...nel.org>, Rob Clark <robdclark@...il.com>,
"Sean Paul" <sean@...rly.run>,
Marijn Suijten
<marijn.suijten@...ainline.org>,
"David Airlie" <airlied@...il.com>, Simona
Vetter <simona@...ll.ch>,
Konrad Dybcio <konradybcio@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
<freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/5] drm/msm/dpu: enable SmartDMA on SC8280XP
On 4/25/2025 12:30 PM, Abhinav Kumar wrote:
>
>
> On 4/25/2025 12:00 PM, Dmitry Baryshkov wrote:
>> On Fri, Apr 25, 2025 at 11:34:18AM -0700, Jessica Zhang wrote:
>>>
>>>
>>> On 3/7/2025 9:38 PM, Dmitry Baryshkov wrote:
>>>> From: Abhinav Kumar <quic_abhinavk@...cinc.com>
>>>>
>>>> In order to support more versatile configuration of the display
>>>> pipes on
>>>> SC8280XP, enable SmartDMA for this platform.
>>>>
>>>> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>>>
>>> Hi Dmitry,
>>>
>>> Seems like Abhinav's signed-off-by is missing for the patches that
>>> list him
>>> as author.
>>>
>>
>> Good point. I don't remember, why these patches mark him as an author,
>> but lack SoB. Googling doesn't point out any previous patches. I think
>> the easiest way to fix the issue would be for Abhinav to respond with
>> the SoB. Another option would be for me to reset the author.
>>
>
> I dont recall myself. You can go ahead and drop me as the author.
Sounds good. With the authorship fixed,
Reviewed-by: Jessica Zhang <quic_jesszhan@...cinc.com>
>
>>> Thanks,
>>>
>>> Jessica Zhang
>>>
>>>> ---
>>>> drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h | 16 +++
>>>> +++++--------
>>>> 1 file changed, 8 insertions(+), 8 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/
>>>> dpu_8_0_sc8280xp.h b/drivers/gpu/drm/msm/disp/dpu1/catalog/
>>>> dpu_8_0_sc8280xp.h
>>>> index
>>>> fcee1c3665f88a9defca4fec38dd76d56c97297e..923afc202f5195fa15bcfc1e141fc44134c965e4 100644
>>>> --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>>> +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_8_0_sc8280xp.h
>>>> @@ -74,7 +74,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> {
>>>> .name = "sspp_0", .id = SSPP_VIG0,
>>>> .base = 0x4000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 0,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -82,7 +82,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_1", .id = SSPP_VIG1,
>>>> .base = 0x6000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 4,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -90,7 +90,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_2", .id = SSPP_VIG2,
>>>> .base = 0x8000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 8,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -98,7 +98,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[] = {
>>>> }, {
>>>> .name = "sspp_3", .id = SSPP_VIG3,
>>>> .base = 0xa000, .len = 0x2ac,
>>>> - .features = VIG_SDM845_MASK,
>>>> + .features = VIG_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_vig_sblk_qseed3_3_0,
>>>> .xin_id = 12,
>>>> .type = SSPP_TYPE_VIG,
>>>> @@ -106,7 +106,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_8", .id = SSPP_DMA0,
>>>> .base = 0x24000, .len = 0x2ac,
>>>> - .features = DMA_SDM845_MASK,
>>>> + .features = DMA_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 1,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -114,7 +114,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_9", .id = SSPP_DMA1,
>>>> .base = 0x26000, .len = 0x2ac,
>>>> - .features = DMA_SDM845_MASK,
>>>> + .features = DMA_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 5,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -122,7 +122,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_10", .id = SSPP_DMA2,
>>>> .base = 0x28000, .len = 0x2ac,
>>>> - .features = DMA_CURSOR_SDM845_MASK,
>>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 9,
>>>> .type = SSPP_TYPE_DMA,
>>>> @@ -130,7 +130,7 @@ static const struct dpu_sspp_cfg sc8280xp_sspp[]
>>>> = {
>>>> }, {
>>>> .name = "sspp_11", .id = SSPP_DMA3,
>>>> .base = 0x2a000, .len = 0x2ac,
>>>> - .features = DMA_CURSOR_SDM845_MASK,
>>>> + .features = DMA_CURSOR_SDM845_MASK_SDMA,
>>>> .sblk = &dpu_dma_sblk,
>>>> .xin_id = 13,
>>>> .type = SSPP_TYPE_DMA,
>>>>
>>>
>>
>
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