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Message-ID: <20250425203131.ueswwq2kifozt7m2@footwear>
Date: Fri, 25 Apr 2025 15:31:31 -0500
From: Nishanth Menon <nm@...com>
To: Matt Coster <matt.coster@...tec.com>
CC: Vignesh Raghavendra <vigneshr@...com>, Tero Kristo <kristo@...nel.org>,
        Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Frank Binns
	<frank.binns@...tec.com>,
        Alessio Belle <alessio.belle@...tec.com>,
        Alexandru
 Dadu <alexandru.dadu@...tec.com>,
        Luigi Santivetti
	<luigi.santivetti@...tec.com>,
        Randolph Sapp <rs@...com>, Darren Etheridge
	<detheridge@...com>
Subject: Re: [PATCH v3 2/2] arm64: dts: ti: k3-j721s2: Add GPU node

On 16:26-20250422, Matt Coster wrote:
> The J721S2 binding is based on the TI downstream binding in commit
> 54b0f2a00d92 ("arm64: dts: ti: k3-j721s2-main: add gpu node") from [1]
> but with updated compatible strings.
> 
> The clock[2] and power[3] indices were verified from HTML docs, while
> the intterupt index comes from the TRM[4] (appendix
       ^^ spell check interrupt (please use checkpatch.pl --strict --codespell
to catch these minor nuisance bugs)

> "J721S2_Appendix_20241106_Public.xlsx", "Interrupts (inputs)",
> "GPU_BXS464_WRAP0_GPU_SS_0_OS_IRQ_OUT_0").
> 
> [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel
> [2]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/clocks.html
> [3]: https://downloads.ti.com/tisci/esd/latest/5_soc_doc/j721s2/devices.html
> [4]: https://www.ti.com/lit/zip/spruj28 (revision E)
> 
> Reviewed-by: Randolph Sapp <rs@...com>
> Signed-off-by: Matt Coster <matt.coster@...tec.com>
> ---
> Changes in v3:
> - Use assigned-clocks to pre-load the frequency of the core clock
> - Link to v2: https://lore.kernel.org/r/20250417-bxs-4-64-dts-v2-2-9f8c09233114@imgtec.com
> Changes in v2:
> - Add interrupt reference details
> - Add Randolph's Rb
> - Link to v1: https://lore.kernel.org/r/20250415-bxs-4-64-dts-v1-2-f7d3fa06625d@imgtec.com
> 
> This patch was previously sent as [DO NOT MERGE]:
> https://lore.kernel.org/r/20250410-sets-bxs-4-64-patch-v1-v6-18-eda620c5865f@imgtec.com
> ---
>  arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> index 92bf48fdbeba45ecca8c854db5f72fd3666239c5..9e36cbbe0ea2fefceedcc95b78068ded7ef395f0 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j721s2-main.dtsi
> @@ -2048,4 +2048,18 @@ watchdog8: watchdog@...0000 {
>  		/* reserved for MAIN_R5F1_1 */
>  		status = "reserved";
>  	};
> +
> +	gpu: gpu@...0000000 {
> +		compatible = "ti,j721s2-gpu", "img,img-bxs-4-64", "img,img-rogue";
> +		reg = <0x4e 0x20000000 0x00 0x80000>;
> +		clocks = <&k3_clks 130 1>;
> +		clock-names = "core";
> +		assigned-clocks = <&k3_clks 130 1>;
> +		assigned-clock-rates = <800000000>;
> +		interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
> +		power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>,
> +				<&k3_pds 373 TI_SCI_PD_EXCLUSIVE>;
> +		power-domain-names = "a", "b";
> +		dma-coherent;
> +	};
>  };
> 
> -- 
> 2.49.0
> 

-- 
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3  1A34 DDB5 849D 1736 249D

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