[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <174570370141.31943.7222231536133274406.b4-ty@sntech.de>
Date: Sat, 26 Apr 2025 23:46:16 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
kernel@...labora.com,
Sebastian Reichel <sebastian.reichel@...labora.com>,
Kever Yang <kever.yang@...k-chips.com>,
Shawn Lin <shawn.lin@...k-chips.com>,
devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: enable pcie on Sige5
On Mon, 14 Apr 2025 20:37:38 +0200, Nicolas Frattaroli wrote:
> The ArmSoM Sige5 board exposes PCIe controller 0 on its M.2 slot on the
> bottom of the board. Enable the necessary nodes for it, and also add the
> correct pins for both the power enable GPIO and the PCIe reset GPIO.
>
>
Applied, thanks!
[1/1] arm64: dts: rockchip: enable pcie on Sige5
commit: 8ea46f3b9348ce9105a32be6a1afec0b23adc906
Best regards,
--
Heiko Stuebner <heiko@...ech.de>
Powered by blists - more mailing lists