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Message-ID: <74EAE03C-2316-4590-B0A8-83DB46B786DE@zytor.com>
Date: Sat, 26 Apr 2025 17:35:49 -0700
From: "H. Peter Anvin" <hpa@...or.com>
To: Ingo Molnar <mingo@...nel.org>
CC: Arnd Bergmann <arnd@...nel.org>, Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
        Arnd Bergmann <arnd@...db.de>, Juergen Gross <jgross@...e.com>,
        Boris Ostrovsky <boris.ostrovsky@...cle.com>,
        Alexander Usyskin <alexander.usyskin@...el.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Mateusz Jończyk <mat.jonczyk@...pl>,
        "Mike Rapoport (Microsoft)" <rppt@...nel.org>,
        Ard Biesheuvel <ardb@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>, linux-kernel@...r.kernel.org,
        xen-devel@...ts.xenproject.org,
        Linus Torvalds <torvalds@...ux-foundation.org>
Subject: Re: [PATCH] [RFC] x86/cpu: rework instruction set selection

On April 26, 2025 11:55:50 AM PDT, Ingo Molnar <mingo@...nel.org> wrote:
>
>* H. Peter Anvin <hpa@...or.com> wrote:
>
>> Dropping CMOV would mean dropping P5 support.
>
>Yeah, I think we should make the cutoff at the 686 level. Is there any 
>strong reason not to do that? Stable kernels will still exist for a 
>very long time for ancient boards.
>
>	Ingo

I don't think some of the embedded 586-level ISA CPUs are ancient.

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