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Message-ID: <364cb2a9-af29-4952-acca-59b9c2d73267@kernel.org>
Date: Sun, 27 Apr 2025 21:02:29 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: William Kennington <william@...nnington.com>
Cc: Avi Fishman <avifishman70@...il.com>, Tomer Maimon <tmaimon77@...il.com>,
 Tali Perry <tali.perry1@...il.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, openbmc@...ts.ozlabs.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: nuvoton: Add EDAC controller

On 25/04/2025 23:23, William Kennington wrote:
> On Tue, Apr 15, 2025 at 11:53 PM Krzysztof Kozlowski <krzk@...nel.org> wrote:
>>
>> On 16/04/2025 02:13, William A. Kennington III wrote:
>>> We have the driver support but need a common node for all the 8xx
>>> platforms that contain this device.
>>>
>>> Signed-off-by: William A. Kennington III <william@...nnington.com>
>>> ---
>>
>> You just sent it, so this is v2? If so, then use v2 in subject (see
>> other patches) and provide changelog under ---.
>>
>>>  arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi | 7 +++++++
>>>  1 file changed, 7 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
>>> index 4da62308b274..ccebcb11c05e 100644
>>> --- a/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
>>> +++ b/arch/arm64/boot/dts/nuvoton/nuvoton-common-npcm8xx.dtsi
>>> @@ -56,6 +56,13 @@ clk: rstc: reset-controller@...01000 {
>>>                       #clock-cells = <1>;
>>>               };
>>>
>>> +             mc: memory-controller@...24000 {
>>> +                     compatible = "nuvoton,npcm845-memory-controller";
>>> +                     reg = <0x0 0xf0824000 0x0 0x2000>;
>>> +                     interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
>>> +                     status = "disabled";
>>
>> Why is this disabled? What resources are missing?
>>
> 
> I was avoiding enabling anything would not be used in the most minimal
> kernel configuration (Kdump). Anyone actually using the EDAC data from
> the memory controller could enable it. The np]cm7xx common dts also
> has this node disabled, so it would be consistent with that SoC.
DTS is nowwhere relatd to your kernel configuration, so that's wrong
assumption and wrong goals. DTSI should have disabled only devices which
need board-level resources. It seems not the case here, so drop it.

Best regards,
Krzysztof

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