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Message-ID: <4d8a3e79-f454-4e2f-9362-c842354b123a@lunn.ch>
Date: Mon, 28 Apr 2025 18:51:19 +0200
From: Andrew Lunn <andrew@...n.ch>
To: Oleksij Rempel <o.rempel@...gutronix.de>
Cc: "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Florian Fainelli <f.fainelli@...il.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Vladimir Oltean <olteanv@...il.com>,
Woojung Huh <woojung.huh@...rochip.com>,
"Russell King (Oracle)" <linux@...linux.org.uk>,
Heiner Kallweit <hkallweit1@...il.com>, stable@...r.kernel.org,
kernel@...gutronix.de, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH net v1 1/2] net: dsa: microchip: let phylink manage PHY
EEE configuration on KSZ switches
> +/**
> + * ksz_phylink_mac_disable_tx_lpi() - Dummy handler to disable TX LPI
> + * @config: phylink config structure
> + *
> + * For ports with integrated PHYs, LPI is managed internally by hardware.
Could you expand that.
Does it mean the hardware will look at the results of the autoneg and
disable/enable LPI depending on those results? I also assume this
means it is not possible to force LPI on/off, independent of autoneg?
Andrew
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