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Message-ID: <34c92033f4bbf289c6048a85f0f6ba04435e7bf8.camel@icenowy.me>
Date: Mon, 28 Apr 2025 16:40:56 +0800
From: Icenowy Zheng <uwu@...nowy.me>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Emil Renner Berthing <kernel@...il.dk>, Jianlong Huang
<jianlong.huang@...rfivetech.com>, Hal Feng <hal.feng@...rfivetech.com>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] dt-bindings: pinctrl: starfive,jh7110: add
PAD_INTERNAL_* virtual pins
在 2025-04-28星期一的 09:20 +0200,Krzysztof Kozlowski写道:
> On Thu, Apr 24, 2025 at 02:20:15PM GMT, Icenowy Zheng wrote:
> > The JH7110 SoC could support internal GPI signals to be routed to
> > not
> > external GPIO but internal low/high levels.
> >
> > Add two macros, PAD_INTERNAL_LOW and PAD_INTERNAL_HIGH, as two
> > virtual
> > "pads" to represent internal GPI sources with fixed low/high
> > levels.
> >
> > Signed-off-by: Icenowy Zheng <uwu@...nowy.me>
> > ---
> > include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
> > b/include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
> > index 3865f01396395..3cca874b2bef7 100644
> > --- a/include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
> > +++ b/include/dt-bindings/pinctrl/starfive,jh7110-pinctrl.h
> > @@ -126,6 +126,10 @@
> > #define PAD_GMAC0_TXEN 18
> > #define PAD_GMAC0_TXC 19
> >
> > +/* virtual pins for forcing GPI */
> > +#define PAD_INTERNAL_LOW 254
> > +#define PAD_INTERNAL_HIGH 255
>
> Why this cannot be 20 and 21? These are not values for registers, but
> abstract numbers.
The number must not collide with SYS GPIO pads too.
Using 95 and 96 is okay, but dirty.
>
> Best regards,
> Krzysztof
>
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