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Message-ID: <CAL_Jsq+mDoT=XFcPzx5V4dREGfBSGpWo6cnVo0-dsa+dD2tc2A@mail.gmail.com>
Date: Tue, 29 Apr 2025 09:25:21 -0500
From: Rob Herring <robh@...nel.org>
To: Alireza Sanaee <alireza.sanaee@...wei.com>
Cc: devicetree-spec@...r.kernel.org, mark.rutland@....com, 
	linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, 
	jonathan.cameron@...wei.com, shameerali.kolothum.thodi@...wei.com, 
	linuxarm@...wei.com
Subject: Re: [PATCH v1 0/5] DT: Enable sharing resources for SMT threads

On Tue, Apr 22, 2025 at 3:43 AM Alireza Sanaee
<alireza.sanaee@...wei.com> wrote:
>
> This patchset allows for sharing resources between SMT threads in the
> device tree (DT).
>
> WHY? Given the current use of the DT, it is not possible to share L1
> caches, as well as other resources such as clock among SMT threads.
> However, DT spec in section Section 3.8.1 [1], describes how SMT threads
> can be described in the reg array, this is how PowerPC describes SMT
> threads in DT.
>
> CHALLENGE: Given discussions with the community [2], it was apparent
> that it is not straightforward to implement this, since cpu-maps must
> point to a particular CPU node in DT [3], Section 2.1. However, it is
> not only the cpu-map but also there other nodes that point to cpu nodes
> which indeed need care and changes.
>
> SOLUTION: This led to more discussions on what the solution should look
> like and based on recent converstations we ended up with the following
> approach [4].
>
> core0 {
>   thread0 {
>     cpu = <&cpu0 0>;
>   };
>   thread1 {
>     cpu = <&cpu0 1>;
>   };
> };
>
> In this layout, first parameter is the phandle to cpu-node and second
> index would be the local-thread index in the reg array available in the
> cpu-node reg property. Further, when reading the property in the cpu-map
> we must know how many parameters phandle has in cpu property. Therefore,
> we optionally introduced "#cpu-cells" property to indicate the number of
> cells.
>
> [1] https://github.com/devicetree-org/devicetree-specification/releases/download/v0.4/devicetree-specification-v0.4.pdf
> [2] https://lore.kernel.org/linux-arm-kernel/Z4FJZPRg75YIUR2l@J2N7QTR9R3/
> [3] https://www.kernel.org/doc/Documentation/devicetree/bindings/cpu/cpu-topology.txt
> [4] https://lore.kernel.org/devicetree-spec/CAL_JsqK1yqRLD9B+G7UUp=D8K++mXHq0Rmv=1i6DL_jXyZwXAw@mail.gmail.com/
>
> Alireza Sanaee (5):
>   DT: add infra for finding CPU id from phandle.
>   arm64: of: handle multiple threads in ARM cpu node

>   driver/base/arch_topology: update CPU map to use the new API.
>   driver/hwtracing/coresight: Use of_cpu_phandle_to_id for grabbing CPU
>     id.

You kind of have the path, but it's 'drivers' not 'driver'. In any
case, that should be dropped. Use the prefix of the particular
subsystem (git log --oneline path should tell you).

These 2 patches do the same change. Use a consistent subject.

>   DT: of_cpu_phandle_to_id to support SMT threads

Patches 1, 3, and 4 are useful refactoring regardless. They should
come first in the series.

>  arch/arm64/kernel/smp.c                       | 74 ++++++++++---------
>  drivers/base/arch_topology.c                  | 12 +--
>  .../coresight/coresight-cti-platform.c        | 15 +---
>  .../hwtracing/coresight/coresight-platform.c  | 14 +---
>  drivers/of/cpu.c                              | 45 +++++++++++
>  include/linux/of.h                            |  3 +
>  6 files changed, 100 insertions(+), 63 deletions(-)
>
> --
> 2.43.0
>

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