linux-kernel - Re: [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for RZ/T2H RSCI

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Message-Id: <20250429104838.a8da03da8f30ede5adc38765@hugovil.com>
Date: Tue, 29 Apr 2025 10:48:38 -0400
From: Hugo Villeneuve <hugo@...ovil.com>
To: Thierry Bultel <thierry.bultel.yh@...renesas.com>
Cc: thierry.bultel@...atsea.fr, linux-renesas-soc@...r.kernel.org,
 geert@...ux-m68k.org, paul.barker.ct@...renesas.com, Geert Uytterhoeven
 <geert+renesas@...der.be>, linux-kernel@...r.kernel.org,
 linux-serial@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH v8 01/11] dt-bindings: serial: Added secondary clock for
 RZ/T2H RSCI

Hi Thierry,

On Tue, 29 Apr 2025 10:19:43 +0200
Thierry Bultel <thierry.bultel.yh@...renesas.com> wrote:

> At boot, the default clock is the PCLKM core lock (synchronous

lock -> clock?

> clock, which is enabled by the bootloader).
> For different baudrates, the asynchronous clock input must be used.
> Clock selection is made by an internal register of RCSI.
> 
> Signed-off-by: Thierry Bultel <thierry.bultel.yh@...renesas.com>
> ---
>  .../bindings/serial/renesas,rsci.yaml          | 18 +++++++++---------
>  1 file changed, 9 insertions(+), 9 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> index ea879db5f485..aa2428837a2f 100644
> --- a/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> +++ b/Documentation/devicetree/bindings/serial/renesas,rsci.yaml
> @@ -35,10 +35,14 @@ properties:
>        - const: tei
>  
>    clocks:
> -    maxItems: 1
> +    items:
> +      - description: serial functional clock
> +      - description: default core clock
>  
>    clock-names:
> -    const: fck # UART functional clock
> +    items:
> +      - const: async
> +      - const: bus
>  
>    power-domains:
>      maxItems: 1
> @@ -58,11 +62,7 @@ unevaluatedProperties: false
>  examples:
>    - |
>      #include <dt-bindings/interrupt-controller/arm-gic.h>
> -    #include <dt-bindings/clock/renesas-cpg-mssr.h>
> -
> -    aliases {
> -        serial0 = &sci0;
> -    };
> +    #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>
>  
>      sci0: serial@...05000 {
>          compatible = "renesas,r9a09g077-rsci";
> @@ -72,7 +72,7 @@ examples:
>                       <GIC_SPI 592 IRQ_TYPE_EDGE_RISING>,
>                       <GIC_SPI 593 IRQ_TYPE_LEVEL_HIGH>;
>          interrupt-names = "eri", "rxi", "txi", "tei";
> -        clocks = <&cpg CPG_MOD 108>;
> -        clock-names = "fck";
> +        clocks = <&cpg CPG_MOD 108>, <&cpg CPG_CORE R9A09G077_CLK_PCLKM>;
> +        clock-names = "async", "bus";
>          power-domains = <&cpg>;
>      };
> -- 
> 2.43.0
> 
> 


-- 
Hugo Villeneuve