linux-kernel - Re: [PATCH v4 12/12] pinctrl: Add pin controller driver for AAEON UP boards

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Message-ID: <CAHp75VfkJ8J=4zmRwjFjq49GRN-=6FCv=uU6+2NUxSW6ZZ+mnQ@mail.gmail.com>
Date: Tue, 29 Apr 2025 23:41:28 +0300
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Thomas Richard <thomas.richard@...tlin.com>
Cc: Linus Walleij <linus.walleij@...aro.org>, 
	Andy Shevchenko <andriy.shevchenko@...ux.intel.com>, Bartosz Golaszewski <brgl@...ev.pl>, 
	Geert Uytterhoeven <geert+renesas@...der.be>, Kees Cook <kees@...nel.org>, 
	Andy Shevchenko <andy@...nel.org>, linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org, 
	thomas.petazzoni@...tlin.com, DanieleCleri@...on.eu, GaryWang@...on.com.tw, 
	linux-hardening@...r.kernel.org
Subject: Re: [PATCH v4 12/12] pinctrl: Add pin controller driver for AAEON UP boards

On Tue, Apr 29, 2025 at 5:08 PM Thomas Richard
<thomas.richard@...tlin.com> wrote:
>
> This enables the pin control support of the onboard FPGA on AAEON UP
> boards.
>
> This FPGA acts as a level shifter between the Intel SoC pins and the pin
> header, and also as a mux or switch.
>
> +---------+          +--------------+             +---+
>           |          |              |             |   |
>           | PWM0     |       \      |             | H |
>           |----------|------  \-----|-------------| E |
>           | I2C0_SDA |              |             | A |
> Intel SoC |----------|------\       |             | D |
>           | GPIO0    |       \------|-------------| E |
>           |----------|------        |             | R |
>           |          |     FPGA     |             |   |
> ----------+          +--------------+             +---+
>
> For most of the pins, the FPGA opens/closes a switch to enable/disable
> the access to the SoC pin from a pin header.
> Each switch, has a direction flag that is set depending the status of the
> SoC pin.
>
> For some other pins, the FPGA acts as a mux, and routes one pin (or the
> other one) to the header.
>
> The driver provides also a gpiochip. It requests SoC pins in GPIO mode,

also provides a GPIO chip

> and drives them in tandem with FPGA pins (switch/mux direction).
>
> This commit adds support only for UP Squared board

Missing period at the end.

...

> +config PINCTRL_UPBOARD
> +       tristate "AAeon UP board FPGA pin controller"
> +       depends on MFD_UPBOARD_FPGA
> +       select PINMUX
> +       select GENERIC_PINCTRL_GROUPS
> +       select GENERIC_PINMUX_FUNCTIONS
> +       select GPIOLIB
> +       select GPIO_AGGREGATOR
> +       help
> +         Pin controller for the FPGA GPIO lines on UP boards. Due to the
> +         hardware layout, the driver control the FPGA pins in tandem with

control --> controls

> +         their corresponding Intel SoC GPIOs.
> +
> +         Currently supported:
> +         - UP Squared
> +
> +         To compile this driver as a module, choose M here: the module
> +         will be called pinctrl-upboard.

...

> +#include <linux/device.h>

> +#include <linux/platform_device.h>

> +#include <linux/stddef.h>

types.h guarantees stddef.h, but having it explicit is not a bad idea,
so up to you. All the same for device.h included by platform_device.h.

> +#include <linux/types.h>

...

> +static const enum upboard_pin_mode upboard_up2_i2s0_modes[] = {
> +       UPBOARD_PIN_MODE_GPIO_OUT,
> +       UPBOARD_PIN_MODE_GPIO_OUT,
> +       UPBOARD_PIN_MODE_GPIO_IN,
> +       UPBOARD_PIN_MODE_GPIO_OUT

Keep trailing comma.

> +};

...

> +static void upboard_pinctrl_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
> +                                    unsigned int offset)
> +{
> +       int ret;
> +
> +       ret = upboard_pinctrl_pin_get_mode(pctldev, offset);
> +       if (ret == UPBOARD_PIN_MODE_FUNCTION)
> +               seq_puts(s, "mode function ");
> +       else if (ret == UPBOARD_PIN_MODE_DISABLED)
> +               seq_puts(s, "HIGH-Z");

No space in this line?


> +       else
> +               seq_printf(s, "GPIO (%s) ", str_input_output(ret == UPBOARD_PIN_MODE_GPIO_IN));
> +}

--
With Best Regards,
Andy Shevchenko