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Message-ID: <174596194659.227689.14787521084378492437.b4-ty@sntech.de>
Date: Tue, 29 Apr 2025 23:25:49 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Rob Herring <robh@...nel.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Detlev Casanova <detlev.casanova@...labora.com>,
	Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Cc: Heiko Stuebner <heiko@...ech.de>,
	kernel@...labora.com,
	devicetree@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	linux-rockchip@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: dts: rockchip: fix Sige5 RTC interrupt pin


On Tue, 29 Apr 2025 18:51:55 +0200, Nicolas Frattaroli wrote:
> Someone made a typo when they added the RTC to the Sige5 DTS, which
> resulted in it using interrupts from GPIO0 B0 instead of GPIO0 A0. The
> pinctrl entry for it wasn't typoed though, curiously enough.
> 
> The Sige5 v1.1 schematic was used to verify that GPIO0 A0 is the correct
> pin for the RTC wakeup interrupt, so let's change it to that.
> 
> [...]

Applied, thanks!

[1/1] arm64: dts: rockchip: fix Sige5 RTC interrupt pin
      commit: 4bf593be2e462623c4c34c7e3b604eb3f8f9de45

Best regards,
-- 
Heiko Stuebner <heiko@...ech.de>

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