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Message-ID: <20250429071841.1158315-1-quic_jinlmao@quicinc.com>
Date: Tue, 29 Apr 2025 00:18:39 -0700
From: Mao Jinlong <quic_jinlmao@...cinc.com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
Mike Leach
<mike.leach@...aro.org>,
James Clark <james.clark@...aro.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Alexander Shishkin
<alexander.shishkin@...ux.intel.com>
CC: Mao Jinlong <quic_jinlmao@...cinc.com>, <coresight@...ts.linaro.org>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>
Subject: [PATCH v2 0/2] Add Qualcomm extended CTI support
The QCOM extended CTI is a heavily parameterized version of ARM’s CSCTI.
It allows a debugger to send to trigger events to a processor or to send
a trigger event to one or more processors when a trigger event occurs on
another processor on the same SoC, or even between SoCs.
QCOM extended CTI supports up to 128 triggers. And some of the register
offsets are changed.
The commands to configure CTI triggers are the same as ARM's CTI.
Changes in V2:
1. Add enum for compatible items.
2. Move offset arraies to coresight-cti-core
Mao Jinlong (2):
dt-bindings: arm: Add Qualcomm extended CTI
coresight: cti: Add Qualcomm extended CTI support
.../bindings/arm/arm,coresight-cti.yaml | 4 +-
.../hwtracing/coresight/coresight-cti-core.c | 127 ++++++++++++++----
.../coresight/coresight-cti-platform.c | 16 ++-
.../hwtracing/coresight/coresight-cti-sysfs.c | 124 +++++++++++++----
drivers/hwtracing/coresight/coresight-cti.h | 72 +++++-----
5 files changed, 243 insertions(+), 100 deletions(-)
--
2.25.1
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