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Message-ID: <CAF6AEGvGEshZbSmmLZMXGiCjRdDJLa7EKN-gviw4oxcapMKN+Q@mail.gmail.com>
Date: Wed, 30 Apr 2025 11:40:53 -0700
From: Rob Clark <robdclark@...il.com>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
Akhil P Oommen <quic_akhilpo@...cinc.com>, Sean Paul <sean@...rly.run>,
Konrad Dybcio <konradybcio@...nel.org>, Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Marijn Suijten <marijn.suijten@...ainline.org>, David Airlie <airlied@...il.com>,
Simona Vetter <simona@...ll.ch>, Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Jie Zhang <quic_jiezh@...cinc.com>, Rob Clark <robdclark@...omium.org>
Subject: Re: [PATCH v2 5/6] arm64: dts: qcom: qcs8300: Add gpu and gmu nodes
On Wed, Apr 30, 2025 at 3:39 AM Konrad Dybcio
<konrad.dybcio@....qualcomm.com> wrote:
>
> On 4/29/25 2:17 PM, Dmitry Baryshkov wrote:
> > On Mon, Apr 28, 2025 at 11:19:32PM +0200, Konrad Dybcio wrote:
> >> On 4/28/25 12:44 PM, Akhil P Oommen wrote:
> >>> On 4/14/2025 4:31 PM, Konrad Dybcio wrote:
> >>>> On 2/27/25 9:07 PM, Akhil P Oommen wrote:
> >>>>> From: Jie Zhang <quic_jiezh@...cinc.com>
> >>>>>
> >>>>> Add gpu and gmu nodes for qcs8300 chipset.
> >>>>>
> >>>>> Signed-off-by: Jie Zhang <quic_jiezh@...cinc.com>
> >>>>> Signed-off-by: Akhil P Oommen <quic_akhilpo@...cinc.com>
> >>>>> ---
> >>>>
> >>>> [...]
> >>>>
> >>>>> + gmu: gmu@...a000 {
> >>>>> + compatible = "qcom,adreno-gmu-623.0", "qcom,adreno-gmu";
> >>>>> + reg = <0x0 0x03d6a000 0x0 0x34000>,
> >>>>
> >>>> size = 0x26000 so that it doesn't leak into GPU_CC
> >>>
> >>> We dump GPUCC regs into snapshot!
> >>
> >> Right, that's bad.. the dt heuristics are such that each region
> >> is mapped by a single device that it belongs to, with some rare
> >> exceptions..
> >
> > It has been like this for most (all?) GMU / GPUCC generations.
>
> Eeeeh fine, let's keep it here and fix it the next time (tm)
Maybe it would be reasonable to add a comment about this _somewhere_?
(Bindings doc?) I feel like this confusion has come up before. Maybe
it is a bit "ugly" but since gmu is directly banging on gpucc, it
doesn't seem completely inappropriate.
BR,
-R
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