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Message-ID: <20250430012654.235830-1-inochiama@gmail.com>
Date: Wed, 30 Apr 2025 09:26:49 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Alexandre Ghiti <alex@...ti.fr>,
Chen Wang <unicorn_wang@...look.com>,
Inochi Amaoto <inochiama@...il.com>,
Alexander Sverdlin <alexander.sverdlin@...il.com>,
Thomas Bonnefille <thomas.bonnefille@...tlin.com>
Cc: devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org,
sophgo@...ts.linux.dev,
linux-kernel@...r.kernel.org,
Yixun Lan <dlan@...too.org>,
Longbin Li <looong.bin@...il.com>
Subject: [PATCH 0/4] riscv: sophgo: cv18xx: dts rework, part 1
It is a hard time to maintain cv18xx/sg200x device tree file, as
it uses something that dts override, shared peripheral header
and something hard to migrate arm64 arch. So it is time to rework
the device tree file and reduce potential problems.
The part 1 change mainly focus on the format of the current dts
file, and try to make them easy to understand and adpat for the
arm64 arch.
Inochi Amaoto (4):
riscv: dts: sophgo: Move all soc specific device into soc dtsi file
riscv: dts: sophgo: Move riscv cpu definition to a separate file
riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi
riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt
number
arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 43 ++++++---
arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi | 36 +++++++
.../dts/sophgo/{cv18xx.dtsi => cv180x.dtsi} | 95 +++++--------------
arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 43 ++++++---
arch/riscv/boot/dts/sophgo/cv181x.dtsi | 2 +-
arch/riscv/boot/dts/sophgo/sg2002.dtsi | 43 ++++++---
6 files changed, 149 insertions(+), 113 deletions(-)
create mode 100644 arch/riscv/boot/dts/sophgo/cv180x-cpus.dtsi
rename arch/riscv/boot/dts/sophgo/{cv18xx.dtsi => cv180x.dtsi} (75%)
--
2.49.0
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