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Message-ID: <20250430-vagabond-agile-yak-7afe68@kuoka>
Date: Wed, 30 Apr 2025 09:21:03 +0200
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Icenowy Zheng <uwu@...nowy.me>
Cc: Emil Renner Berthing <kernel@...il.dk>,
Jianlong Huang <jianlong.huang@...rfivetech.com>, Hal Feng <hal.feng@...rfivetech.com>,
Linus Walleij <linus.walleij@...aro.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, linux-gpio@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 1/3] dt-bindings: pinctrl: starfive,jh7110: add
PAD_INTERNAL_* virtual pins
On Tue, Apr 29, 2025 at 05:00:04PM GMT, Icenowy Zheng wrote:
> > > > > +/* virtual pins for forcing GPI */
> > > > > +#define PAD_INTERNAL_LOW 254
> > > > > +#define PAD_INTERNAL_HIGH 255
> > > >
> > > > Why this cannot be 20 and 21? These are not values for registers,
> > > > but
> > > > abstract numbers.
> > >
> > > The number must not collide with SYS GPIO pads too.
> >
> > There are no SYS GPIO pads here. Do you understand that this is not
> > value for registers?
>
> Yes I understand.
>
> The situation is that JH7110 has two similar pin mux controllers, one
> SYSGPIO and one AONGPIO. Despite I listed the values after the AONGPIO
> pad list, these values should apply to SYSGPIO too (unless you want to
> let them have different values for these two pinmux controllers), which
> is the part with comment "sys_iomux pins".
It is fine for me in such case.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Best regards,
Krzysztof
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