linux-kernel - Re: [PATCH v3 5/8] drm/msm/dpu: don't select single flush for active CTL blocks

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Message-ID: <eaef144d-3d3e-4c7e-9636-b56a1f61e3b9@quicinc.com>
Date: Tue, 29 Apr 2025 17:02:58 -0700
From: Jessica Zhang <quic_jesszhan@...cinc.com>
To: Dmitry Baryshkov <lumag@...nel.org>, Rob Clark <robdclark@...il.com>,
        Abhinav Kumar <quic_abhinavk@...cinc.com>, Sean Paul <sean@...rly.run>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        David Airlie
	<airlied@...il.com>, Simona Vetter <simona@...ll.ch>
CC: <linux-arm-msm@...r.kernel.org>, <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>,
        "Neil
 Armstrong" <neil.armstrong@...aro.org>
Subject: Re: [PATCH v3 5/8] drm/msm/dpu: don't select single flush for active
 CTL blocks



On 3/6/2025 10:24 PM, Dmitry Baryshkov wrote:
> From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> 
> In case of ACTIVE CTLs, a single CTL is being used for flushing all INTF
> blocks. Don't skip programming the CTL on those targets.
> 
> Tested-by: Neil Armstrong <neil.armstrong@...aro.org> # on SM8550-QRD
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

Reviewed-by: Jessica Zhang <quic_jesszhan@...cinc.com>

> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> index 232055473ba55998b79dd2e8c752c129bbffbff4..8a618841e3ea89acfe4a42d48319a6c54a1b3495 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c
> @@ -374,7 +374,8 @@ static void dpu_encoder_phys_vid_underrun_irq(void *arg)
>   static bool dpu_encoder_phys_vid_needs_single_flush(
>   		struct dpu_encoder_phys *phys_enc)
>   {
> -	return phys_enc->split_role != ENC_ROLE_SOLO;
> +	return !(phys_enc->hw_ctl->caps->features & BIT(DPU_CTL_ACTIVE_CFG)) &&
> +		phys_enc->split_role != ENC_ROLE_SOLO;
>   }
>   
>   static void dpu_encoder_phys_vid_atomic_mode_set(
>