| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <20250501044239.9404-5-ziyao@disroot.org>
Date: Thu, 1 May 2025 04:42:39 +0000
From: Yao Zi <ziyao@...root.org>
To: Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Huacai Chen <chenhuacai@...nel.org>,
WANG Xuerui <kernel@...0n.name>,
Yao Zi <ziyao@...root.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Junhao Xie <bigfoot@...ssfun.cn>,
Rafał Miłecki <rafal@...ecki.pl>,
Aradhya Bhatia <a-bhatia1@...com>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Binbin Zhou <zhoubinbin@...ngson.cn>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
loongarch@...ts.linux.dev,
Mingcong Bai <jeffbai@...c.io>,
Kexy Biscuit <kexybiscuit@...c.io>
Subject: [PATCH 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
core and targets embedded market. Only CPU core, legacy interrupt
controllers and UARTs are defined for now.
Signed-off-by: Yao Zi <ziyao@...root.org>
---
arch/loongarch/boot/dts/loongson-2k0300.dtsi | 197 +++++++++++++++++++
1 file changed, 197 insertions(+)
create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
new file mode 100644
index 000000000000..6991a368ff94
--- /dev/null
+++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
@@ -0,0 +1,197 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Loongson Technology Corporation Limited
+ * Copyright (C) 2025 Yao Zi <ziyao@...root.org>
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ compatible = "loongson,ls2k0300";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ aliases {
+ serial0 = &uart0;
+ serial1 = &uart1;
+ serial2 = &uart2;
+ serial3 = &uart3;
+ serial4 = &uart4;
+ serial5 = &uart5;
+ serial6 = &uart6;
+ serial7 = &uart7;
+ serial8 = &uart8;
+ serial9 = &uart9;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ compatible = "loongson,la264";
+ reg = <0>;
+ device_type = "cpu";
+ clocks = <&cpu_clk>;
+ };
+
+ };
+
+ cpuintc: interrupt-controller {
+ compatible = "loongson,cpu-interrupt-controller";
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ cpu_clk: clock-1000m {
+ compatible = "fixed-clock";
+ clock-frequency = <1000000000>;
+ #clock-cells = <0>;
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
+ <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
+ <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
+
+ liointc0: interrupt-controller@...01400{
+ compatible = "loongson,liointc-2.0";
+ reg = <0x0 0x16001400 0x0 0x40>,
+ <0x0 0x16001040 0x0 0x8>;
+ reg-names = "main", "isr0";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+ interrupt-names = "int0";
+
+ loongson,parent_int_map = <0xffffffff>, /* int0 */
+ <0x00000000>, /* int1 */
+ <0x00000000>, /* int2 */
+ <0x00000000>; /* int3 */
+ };
+
+ liointc1: interrupt-controller@...01440 {
+ compatible = "loongson,liointc-2.0";
+ reg = <0x0 0x16001440 0x0 0x40>,
+ <0x0 0x16001048 0x0 0x8>;
+ reg-names = "main", "isr0";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpuintc>;
+ interrupts = <4>;
+ interrupt-names = "int2";
+
+ loongson,parent_int_map = <0x00000000>, /* int0 */
+ <0x00000000>, /* int1 */
+ <0xffffffff>, /* int2 */
+ <0x00000000>; /* int3 */
+ };
+
+ uart0: serial@...00000 {
+ compatible = "ns16550a";
+ reg = <0 0x16100000 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart1: serial@...00400 {
+ compatible = "ns16550a";
+ reg = <0 0x16100400 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart2: serial@...00800 {
+ compatible = "ns16550a";
+ reg = <0 0x16100800 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart3: serial@...00c00 {
+ compatible = "ns16550a";
+ reg = <0 0x16100c00 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart4: serial@...01000 {
+ compatible = "ns16550a";
+ reg = <0 0x16101000 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart5: serial@...01400 {
+ compatible = "ns16550a";
+ reg = <0 0x16101400 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart6: serial@...01800 {
+ compatible = "ns16550a";
+ reg = <0 0x16101800 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart7: serial@...01c00 {
+ compatible = "ns16550a";
+ reg = <0 0x16101c00 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart8: serial@...02000 {
+ compatible = "ns16550a";
+ reg = <0 0x16102000 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ uart9: serial@...02400 {
+ compatible = "ns16550a";
+ reg = <0 0x16102400 0 0x10>;
+ interrupt-parent = <&liointc0>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ no-loopback-test;
+ status = "disabled";
+ };
+
+ isa@...00000 {
+ compatible = "isa";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <1 0x0 0x0 0x16400000 0x4000>;
+ };
+ };
+};
--
2.49.0
Powered by blists - more mailing lists