linux-kernel - RE: [PATCH v4 01/15] clk: renesas: rzv2h-cpg: Add support for DSI clocks

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Message-ID:
 <TYCPR01MB1209317F533E528616A4C2492C2822@TYCPR01MB12093.jpnprd01.prod.outlook.com>
Date: Thu, 1 May 2025 10:38:50 +0000
From: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
To: ALOK TIWARI <alok.a.tiwari@...cle.com>, Prabhakar
	<prabhakar.csengg@...il.com>, Andrzej Hajda <andrzej.hajda@...el.com>, Neil
 Armstrong <neil.armstrong@...aro.org>, Robert Foss <rfoss@...nel.org>,
	laurent.pinchart <laurent.pinchart@...asonboard.com>, Jonas Karlman
	<jonas@...boo.se>, Jernej Skrabec <jernej.skrabec@...il.com>, Maarten
 Lankhorst <maarten.lankhorst@...ux.intel.com>, Maxime Ripard
	<mripard@...nel.org>, Thomas Zimmermann <tzimmermann@...e.de>, David Airlie
	<airlied@...il.com>, Simona Vetter <simona@...ll.ch>, Rob Herring
	<robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
	<conor+dt@...nel.org>, Biju Das <biju.das.jz@...renesas.com>, Geert
 Uytterhoeven <geert+renesas@...der.be>, Michael Turquette
	<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Philipp Zabel
	<p.zabel@...gutronix.de>, Magnus Damm <magnus.damm@...il.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, Prabhakar Mahadev
 Lad <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH v4 01/15] clk: renesas: rzv2h-cpg: Add support for DSI
 clocks

Hi Alok,

Thanks for your email.

> From: ALOK TIWARI <alok.a.tiwari@...cle.com>
> Sent: 01 May 2025 10:51
> Subject: Re: [PATCH v4 01/15] clk: renesas: rzv2h-cpg: Add support for DSI clocks
> 
> 
> On 01-05-2025 02:10, Prabhakar wrote:
> > From: Lad Prabhakar<prabhakar.mahadev-lad.rj@...renesas.com>
> >
> > Add support for PLLDSI and PLLDSI divider clocks.
> >
> > Introduce the `renesas-rzv2h-dsi.h` header to centralize and share
> > PLLDSI-related data structures, limits, and algorithms between the RZ/V2H
> > CPG and DSI drivers.
> >
> > The DSI PLL is functionally similar to the CPG's PLLDSI, but has slightly
> > different parameter limits and omits the programmable divider present in
> > CPG. To ensure precise frequency calculations-especially for milliHz-level
> > accuracy needed by the DSI driver-the shared algorithm allows both drivers
> > to compute PLL parameters consistently using the same logic and input
> > clock.
> >
> > Co-developed-by: Fabrizio Castro<fabrizio.castro.jz@...esas.com>
> > Signed-off-by: Fabrizio Castro<fabrizio.castro.jz@...esas.com>
> > Signed-off-by: Lad Prabhakar<prabhakar.mahadev-lad.rj@...renesas.com>
> 
> 
> Acked-by: Alok Tiwari <alok.a.tiwari@...cle.com>

I am not sure it makes sense for you to Ack this patch?
Please have a look at the process here:
https://www.kernel.org/doc/Documentation/process/submitting-patches.rst

Perhaps you meant to add your Reviewed-by tag instead?

Cheers,
Fab

> 
> Thanks,
> Alok