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Message-Id: <20250502150513.4169098-11-m.felsch@pengutronix.de>
Date: Fri, 2 May 2025 17:05:13 +0200
From: Marco Felsch <m.felsch@...gutronix.de>
To: nicolas.dufresne@...labora.com,
benjamin.gaignard@...labora.com,
p.zabel@...gutronix.de,
mchehab@...nel.org,
shawnguo@...nel.org,
Sascha Hauer <s.hauer@...gutronix.de>,
kernel@...gutronix.de,
festevam@...il.com,
robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
paulk@...-base.io,
hverkuil@...all.nl,
laurent.pinchart@...asonboard.com,
sebastian.fricke@...labora.com,
ming.qian@....com
Cc: linux-kernel@...r.kernel.org,
linux-media@...r.kernel.org,
linux-rockchip@...ts.infradead.org,
imx@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org
Subject: [RFC PATCH 10/11] media: verisilicon: split read/write debug
Allow a more fine grain read/write debug control. This is very useful in
case of hantro_reg_write() is used to not interfere the write debug
prints with read debug prints.
While on it, make the reg/swreg value clear for new developers.
Signed-off-by: Marco Felsch <m.felsch@...gutronix.de>
---
drivers/media/platform/verisilicon/hantro.h | 15 ++++++++-------
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/drivers/media/platform/verisilicon/hantro.h b/drivers/media/platform/verisilicon/hantro.h
index e464bec47b11..7b031df5b0a1 100644
--- a/drivers/media/platform/verisilicon/hantro.h
+++ b/drivers/media/platform/verisilicon/hantro.h
@@ -367,7 +367,8 @@ struct hantro_decoded_buffer {
* bit 3 - contents of big controls from userspace
* bit 4 - detail fmt, ctrl, buffer q/dq information
* bit 5 - detail function enter/leave trace information
- * bit 6 - register write/read information
+ * bit 6 - register write information
+ * bit 7 - register read information
*/
extern int hantro_debug;
@@ -391,13 +392,13 @@ static __always_inline struct hantro_ctx *fh_to_ctx(struct v4l2_fh *fh)
static __always_inline void vepu_write_relaxed(struct hantro_dev *vpu,
u32 val, u32 reg)
{
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(6, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
writel_relaxed(val, vpu->enc_base + reg);
}
static __always_inline void vepu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(6, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
writel(val, vpu->enc_base + reg);
}
@@ -405,20 +406,20 @@ static __always_inline u32 vepu_read(struct hantro_dev *vpu, u32 reg)
{
u32 val = readl(vpu->enc_base + reg);
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(7, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
return val;
}
static __always_inline void vdpu_write_relaxed(struct hantro_dev *vpu,
u32 val, u32 reg)
{
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(6, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
writel_relaxed(val, vpu->dec_base + reg);
}
static __always_inline void vdpu_write(struct hantro_dev *vpu, u32 val, u32 reg)
{
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(6, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
writel(val, vpu->dec_base + reg);
}
@@ -433,7 +434,7 @@ static __always_inline u32 vdpu_read(struct hantro_dev *vpu, u32 reg)
{
u32 val = readl(vpu->dec_base + reg);
- vpu_debug(6, "0x%04x = 0x%08x\n", reg / 4, val);
+ vpu_debug(7, "0x%04x (swreg%u) = 0x%08x\n", reg, reg / 4, val);
return val;
}
--
2.39.5
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