linux-kernel - Re: [PATCH v2 1/2] dt-bindings: PCI: amd-mdb: Add `reset-gpios` property to example device tree

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Message-ID: <ph5rby7y3jnu4fnbhiojesu6dsnre63vc4hmsjyasajrvurj6g@g6eo7lvjtuax>
Date: Fri, 2 May 2025 20:55:20 +0530
From: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
To: Sai Krishna Musham <sai.krishna.musham@....com>
Cc: bhelgaas@...gle.com, lpieralisi@...nel.org, kw@...ux.com, 
	robh@...nel.org, krzk+dt@...nel.org, conor+dt@...nel.org, cassel@...nel.org, 
	linux-pci@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	michal.simek@....com, bharat.kumar.gogada@....com, thippeswamy.havalige@....com
Subject: Re: [PATCH v2 1/2] dt-bindings: PCI: amd-mdb: Add `reset-gpios`
 property to example device tree

On Tue, Apr 29, 2025 at 02:30:45PM +0530, Sai Krishna Musham wrote:
> Add `reset-gpios` property to the example device tree node for
> GPIO-based handling of the PCIe Root Port (RP) PERST# signal.
> 
> Signed-off-by: Sai Krishna Musham <sai.krishna.musham@....com>
> ---
> Changes in v2:
> - Update commit message
> ---
>  Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> index 43dc2585c237..e6117d326279 100644
> --- a/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> +++ b/Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml
> @@ -87,6 +87,7 @@ examples:
>    - |
>      #include <dt-bindings/interrupt-controller/arm-gic.h>
>      #include <dt-bindings/interrupt-controller/irq.h>
> +    #include <dt-bindings/gpio/gpio.h>
>  
>      soc {
>          #address-cells = <2>;
> @@ -112,6 +113,7 @@ examples:
>              #size-cells = <2>;
>              #interrupt-cells = <1>;
>              device_type = "pci";
> +            reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>;

You should move this property to the PCI bridge node where it belongs to. We
identified this issue of stuffing bridge specific properties to the controller
node recently (yeah very late though), but since this controller doesn't have
any bridge specific properties till now, I'd like it to do the right thing.

So please refer the STM32 sereies on how to do it [1][2]. On the driver side,
you specifically need to implement an equivalent of stm32_pcie_parse_port() in
that patch that parses the bridge node(s) for these properties.

- Mani

[1] https://lore.kernel.org/linux-pci/20250423090119.4003700-2-christian.bruel@foss.st.com/
[2] https://lore.kernel.org/linux-pci/20250423090119.4003700-3-christian.bruel@foss.st.com/

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