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Message-ID: <20250502160541.azhzbnmghrkory7h@cleaver>
Date: Fri, 2 May 2025 11:05:41 -0500
From: Nishanth Menon <nm@...com>
To: Paresh Bhagat <p-bhagat@...com>
CC: <vigneshr@...com>, <praneeth@...com>, <kristo@...nel.org>,
<robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
<linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>, <khasim@...com>, <v-singh1@...com>,
<afd@...com>
Subject: Re: [PATCH v2 1/3] dt-bindings: arm: ti: Add bindings for AM62D2 SoC
On 21:09-20250502, Paresh Bhagat wrote:
> The AM62D2 SoC belongs to the K3 Multicore SoC architecture with DSP core
> targeted for applications needing high-performance Digital Signal
> Processing. It is used in applications like automotive audio systems,
> professional sound equipment, radar and radio for aerospace, sonar in
> marine devices, and ultrasound in medical imaging. It also supports
> precise signal analysis in test and measurement tools.
>
> Some highlights of AM62D2 SoC are:
>
> * Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster. Dual/Single
> core variants are provided in the same package to allow HW compatible
> designs.
> * One Device manager Cortex-R5F for system power and resource management,
> and one Cortex-R5F for Functional Safety or general-purpose usage.
> * DSP with Matrix Multiplication Accelerator(MMA) (up to 2 TOPS) based on
> single core C7x.
> * 3x Multichannel Audio Serial Ports (McASP) Up to 4/6/16 Serial Data Pins
> which can Transmit and Receive Clocks up to 50MHz, with multi-channel I2S
> and TDM Audio inputs and outputs.
> * Integrated Giga-bit Ethernet switch supporting up to a total of two
> external ports with TSN capable to enable audio networking features such
> as, Ethernet Audio Video Bridging (eAVB) and Dante.
> * 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, OSPI memory
> controller, 1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other
> peripherals.
> * Dedicated Centralized Hardware Security Module with support for secure
> boot, debug security and crypto acceleration and trusted execution
> environment.
> * One 32 bit DDR Subsystem that supports LPDDR4, DDR4 memory types.
> * Low power mode support: Partial IO support for CAN/GPIO/UART wakeup.
>
> This adds dt bindings for TI's AM62D2 family of devices.
>
> More details about the SoCs can be found in the Technical Reference Manual:
> https://www.ti.com/lit/pdf/sprujd4
>
> Signed-off-by: Paresh Bhagat <p-bhagat@...com>
Looking at the board patch in the series, this is am62p5 ? what is the
difference? If there is a difference, why is there no dtsi
file for am62d?
> ---
> Documentation/devicetree/bindings/arm/ti/k3.yaml | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml
> index a6d9fd0bcaba..bac821d63cf1 100644
> --- a/Documentation/devicetree/bindings/arm/ti/k3.yaml
> +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml
> @@ -31,6 +31,12 @@ properties:
> - const: phytec,am62a-phycore-som
> - const: ti,am62a7
>
> + - description: K3 AM62D2 SoC and Boards
> + items:
> + - enum:
> + - ti,am62d2-evm
> + - const: ti,am62d2
> +
> - description: K3 AM62P5 SoC and Boards
> items:
> - enum:
> --
> 2.34.1
>
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
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