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Message-ID: <a85fbebe-aa44-5ca0-f8ad-f997ea7e6622@gentwo.org>
Date: Fri, 2 May 2025 09:42:22 -0700 (PDT)
From: "Christoph Lameter (Ampere)" <cl@...two.org>
To: Ankur Arora <ankur.a.arora@...cle.com>
cc: linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, bpf@...r.kernel.org, arnd@...db.de,
catalin.marinas@....com, will@...nel.org, peterz@...radead.org,
akpm@...ux-foundation.org, mark.rutland@....com, harisokn@...zon.com,
ast@...nel.org, memxor@...il.com, zhenglifeng1@...wei.com,
xueshuai@...ux.alibaba.com, joao.m.martins@...cle.com,
boris.ostrovsky@...cle.com, konrad.wilk@...cle.com
Subject: Re: [PATCH v2 0/7] barrier: introduce smp_cond_load_*_timewait()
On Fri, 2 May 2025, Ankur Arora wrote:
> smp_cond_load_relaxed_spinwait(ptr, cond_expr, time_expr_ns, time_limit_ns)
> took four arguments, with ptr and cond_expr doing the usual smp_cond_load()
> things and time_expr_ns and time_limit_ns being used to decide the
> terminating condition.
>
> There were some problems in the timekeeping:
>
> 1. How often do we do the (relatively expensive) time-check?
Is this really important? We have instructions that wait on an event and
terminate at cycle counter values like WFET on arm64
The case were we need to perform time checks is only needed if the
processor does not support WFET but must use a event stream or does not
even have that available.
So the best approach is to have a simple interface were we specify the
cycle count when the wait is to be terminated and where we can cover that
with one WFET instruction.
The other cases then are degenerate forms of that. If only WFE is
available then only use that if the timeout is larger than the event
stream granularity. Or if both are not available them do the relax /
loop thing.
So the interface could be much simpler:
__smp_cond_load_relaxed_wait(ptr, timeout_cycle_count)
with a wrapper
smp_cond_relaxed_wait_expr(ptr, expr, timeout cycle count)
where we check the expression too and retry if the expression is not true.
The fallbacks with the spins and relax logic would be architecture
specific.
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