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Message-Id: <20250502-mt8365-infracfg-nao-compatible-v1-1-e40394573f98@collabora.com>
Date: Fri, 02 May 2025 12:43:21 -0400
From: Nícolas F. R. A. Prado <nfraprado@...labora.com>
To: Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>, 
 Krzysztof Kozlowski <krzk+dt@...nel.org>, 
 Conor Dooley <conor+dt@...nel.org>, 
 Matthias Brugger <matthias.bgg@...il.com>, 
 AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>, 
 Alexandre Mergnat <amergnat@...libre.com>, 
 Amjad Ouled-Ameur <aouledameur@...libre.com>, 
 Bernhard Rosenkränzer <bero@...libre.com>, 
 Fabien Parent <fparent@...libre.com>
Cc: kernel@...labora.com, devicetree@...r.kernel.org, 
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org, 
 linux-mediatek@...ts.infradead.org, 
 Nícolas F. R. A. Prado <nfraprado@...labora.com>
Subject: [PATCH 1/2] dt-bindings: mfd: syscon: Add
 mediatek,mt8365-infracfg-nao

The register space described by DT node of compatible
mediatek,mt8365-infracfg-nao exposes a variety of unrelated registers,
including registers for controlling bus protection on the MT8365 SoC,
which is used by the power domain controller through a syscon.

Add this compatible to the syscon binding.

Signed-off-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
---
 Documentation/devicetree/bindings/mfd/syscon.yaml | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
index c6bbb19c3e3e2245b4a823df06e7f361da311000..f655ec18cc2d96028d17e19d704b62f6d898fea4 100644
--- a/Documentation/devicetree/bindings/mfd/syscon.yaml
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -190,6 +190,7 @@ properties:
           - mediatek,mt8135-pctl-a-syscfg
           - mediatek,mt8135-pctl-b-syscfg
           - mediatek,mt8173-pctl-a-syscfg
+          - mediatek,mt8365-infracfg-nao
           - mediatek,mt8365-syscfg
           - microchip,lan966x-cpu-syscon
           - microchip,mpfs-sysreg-scb

-- 
2.49.0


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