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Message-ID: <20250502165535.aeb2osq2vnxsudmq@pengutronix.de>
Date: Fri, 2 May 2025 18:55:35 +0200
From: Marco Felsch <m.felsch@...gutronix.de>
To: Adam Ford <aford173@...il.com>
Cc: nicolas.dufresne@...labora.com, benjamin.gaignard@...labora.com,
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Subject: Re: [RFC PATCH 07/11] arm64: dts: imx8mp: fix VPU_BUS clock setting
On 25-05-02, Adam Ford wrote:
> On Fri, May 2, 2025 at 10:10 AM Marco Felsch <m.felsch@...gutronix.de> wrote:
> >
> > The VPU_PLL clock must be set before the VPU_BUS clock which is derived
> > from the VPU_PLL clock else the VPU_BUS clock is 300MHz and not 600MHz.
> >
> > Signed-off-by: Marco Felsch <m.felsch@...gutronix.de>
> > ---
> > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > index 97b09b647ec7..7f4bdefb3480 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> > @@ -2289,8 +2289,8 @@ vpumix_blk_ctrl: blk-ctrl@...30000 {
> > <&clk IMX8MP_CLK_VPU_G2_ROOT>,
> > <&clk IMX8MP_CLK_VPU_VC8KE_ROOT>;
> > clock-names = "g1", "g2", "vc8000e";
> > - assigned-clocks = <&clk IMX8MP_CLK_VPU_BUS>, <&clk IMX8MP_VPU_PLL>;
> > - assigned-clock-parents = <&clk IMX8MP_VPU_PLL_OUT>;
> > + assigned-clocks = <&clk IMX8MP_VPU_PLL>, <&clk IMX8MP_CLK_VPU_BUS>;
> > + assigned-clock-parents = <0>, <&clk IMX8MP_VPU_PLL_OUT>;
> > assigned-clock-rates = <600000000>, <600000000>;
>
> I think there was a move to make the default be overdrive [1] and [2]
> and use a 'nominal' device tree for those who are not in overdrive
> mode. According to the TRM, the VPU_BUS_CLK_ROOT, the nominal is
> 600MHz and the overdrive is 800MHz. Based on that, I wonder if the
> values here should be 800MHz and if we should add the nominal values
> of 600MHz to the imx8m-nominal.dtsi file.
You're right, Ahamd and Lucas did change this. I will adapt it later on.
Regards,
Marco
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