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Message-ID: <rjhuxssogtsxitmocxnlt3im44imyvui5ssc6ptshepxvgo2hv@npmexcs7nqpy>
Date: Sat, 3 May 2025 01:55:58 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Konrad Dybcio <konradybcio@...nel.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
Marijn Suijten <marijn.suijten@...ainline.org>,
linux-arm-msm@...r.kernel.org, linux-remoteproc@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Subject: Re: [PATCH 3/3] arm64: dts: qcom: sc8280xp: Add SLPI
On Sat, May 03, 2025 at 12:38:01AM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
>
> SC8280XP features a SLPI (Sensor Low Power Island) core. Describe it.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Have your tried enabling it for X13s? Windows drivers provide
qcslpi8280.mbn in the qcsubsys_ext_scss8280.cab cabinet.
> ---
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 72 ++++++++++++++++++++++++++++++++++
> 1 file changed, 72 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 3f9195da90ee898c68296f19dc55bcb3ac73fe29..75ec34bfa729946687c4c35aa9550685cac95a10 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -695,6 +695,11 @@ pil_adsp_mem: adsp-region@...00000 {
> no-map;
> };
>
> + pil_slpi_mem: slpi-region@...00000 {
> + reg = <0 0x88c00000 0 0x1500000>;
> + no-map;
> + };
> +
> pil_nsp0_mem: cdsp0-region@...00000 {
> reg = <0 0x8a100000 0 0x1e00000>;
> no-map;
> @@ -783,6 +788,30 @@ smp2p_nsp1_in: slave-kernel {
> };
> };
>
> + smp2p-slpi {
> + compatible = "qcom,smp2p";
> + qcom,smem = <481>, <430>;
> + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_SMP2P
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_SMP2P>;
> +
> + qcom,local-pid = <0>;
> + qcom,remote-pid = <3>;
> +
> + smp2p_slpi_out: master-kernel {
> + qcom,entry-name = "master-kernel";
> + #qcom,smem-state-cells = <1>;
> + };
> +
> + smp2p_slpi_in: slave-kernel {
> + qcom,entry-name = "slave-kernel";
> + interrupt-controller;
> + #interrupt-cells = <2>;
> + };
> + };
> +
> soc: soc@0 {
> compatible = "simple-bus";
> #address-cells = <2>;
> @@ -2454,6 +2483,49 @@ tcsr: syscon@...0000 {
> reg = <0x0 0x01fc0000 0x0 0x30000>;
> };
>
> + remoteproc_slpi: remoteproc@...0000 {
> + compatible = "qcom,sc8280xp-slpi-pas", "qcom,sm8350-slpi-pas";
> + reg = <0 0x02400000 0 0x10000>;
> +
> + interrupts-extended = <&pdc 9 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 0 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 1 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 2 IRQ_TYPE_EDGE_RISING>,
> + <&smp2p_slpi_in 3 IRQ_TYPE_EDGE_RISING>;
> + interrupt-names = "wdog",
> + "fatal",
> + "ready",
> + "handover",
> + "stop-ack";
> +
> + clocks = <&rpmhcc RPMH_CXO_CLK>;
> + clock-names = "xo";
> +
> + power-domains = <&rpmhpd SC8280XP_LCX>,
> + <&rpmhpd SC8280XP_LMX>;
> + power-domain-names = "lcx", "lmx";
> +
> + memory-region = <&pil_slpi_mem>;
> +
> + qcom,qmp = <&aoss_qmp>;
> +
> + qcom,smem-states = <&smp2p_slpi_out 0>;
> + qcom,smem-state-names = "stop";
> +
> + status = "disabled";
> +
> + glink-edge {
> + interrupts-extended = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_GLINK_QMP
> + IRQ_TYPE_EDGE_RISING>;
> + mboxes = <&ipcc IPCC_CLIENT_SLPI
> + IPCC_MPROC_SIGNAL_GLINK_QMP>;
> +
> + label = "slpi";
> + qcom,remote-pid = <3>;
No fastrpc contexts?
> + };
> + };
> +
> remoteproc_adsp: remoteproc@...0000 {
> compatible = "qcom,sc8280xp-adsp-pas";
> reg = <0 0x03000000 0 0x10000>;
>
> --
> 2.49.0
>
--
With best wishes
Dmitry
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