linux-kernel - Re: [PATCH v2 4/5] drm/mediatek: Add MDP-RSZ component support for MT8196

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Message-ID: <d5ba3c060744ab6ad188399550598718d036abfc.camel@mediatek.com>
Date: Fri, 2 May 2025 06:11:54 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"chunkuang.hu@...nel.org" <chunkuang.hu@...nel.org>, "AngeloGioacchino Del
 Regno" <angelogioacchino.delregno@...labora.com>,
	Sunny Shen (沈姍姍) <Sunny.Shen@...iatek.com>
CC: Singo Chang (張興國) <Singo.Chang@...iatek.com>,
	"treapking@...omium.org" <treapking@...omium.org>,
	Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>,
	"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>,
	Jason-JH Lin (林睿祥) <Jason-JH.Lin@...iatek.com>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>,
	Paul-pl Chen (陳柏霖) <Paul-pl.Chen@...iatek.com>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	"matthias.bgg@...il.com" <matthias.bgg@...il.com>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>
Subject: Re: [PATCH v2 4/5] drm/mediatek: Add MDP-RSZ component support for
 MT8196

On Mon, 2025-04-21 at 21:38 +0800, Sunny Shen wrote:
> Add MDP-RSZ component support for MT8196.

Reviewed-by: CK Hu <ck.hu@...iatek.com>

> 
> Signed-off-by: Sunny Shen <sunny.shen@...iatek.com>
> ---
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.c | 24 ++++++++++++++++++++++++
>  drivers/gpu/drm/mediatek/mtk_ddp_comp.h |  1 +
>  drivers/gpu/drm/mediatek/mtk_drm_drv.c  |  2 ++
>  3 files changed, 27 insertions(+)
> 
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> index 6628f5cd732a..04f13ca3601b 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.c
> @@ -46,6 +46,9 @@
>  #define DSC_BYPASS				BIT(4)
>  #define DSC_UFOE_SEL				BIT(16)
>  
> +#define DISP_REG_MDP_RSZ_INPUT_SIZE		0x0010
> +#define DISP_REG_MDP_RSZ_OUTPUT_SIZE		0x0014
> +
>  #define DISP_REG_OD_EN				0x0000
>  #define DISP_REG_OD_CFG				0x0020
>  #define OD_RELAYMODE				BIT(0)
> @@ -235,6 +238,19 @@ static void mtk_od_start(struct device *dev)
>  	writel(1, priv->regs + DISP_REG_OD_EN);
>  }
>  
> +static void mtk_mdp_rsz_config(struct device *dev, unsigned int w,
> +			       unsigned int h, unsigned int vrefresh,
> +			       unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> +{
> +	struct mtk_ddp_comp_dev *priv = dev_get_drvdata(dev);
> +
> +	/* Set size = 0 for bypass mode */
> +	mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_MDP_RSZ_INPUT_SIZE);
> +	mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs,
> +		      DISP_REG_MDP_RSZ_OUTPUT_SIZE);
> +}
> +
>  static void mtk_postmask_config(struct device *dev, unsigned int w,
>  				unsigned int h, unsigned int vrefresh,
>  				unsigned int bpc, struct cmdq_pkt *cmdq_pkt)
> @@ -393,6 +409,12 @@ static const struct mtk_ddp_comp_funcs ddp_ovlsys_adaptor = {
>  	.get_num_formats = mtk_ovlsys_adaptor_get_num_formats,
>  };
>  
> +static const struct mtk_ddp_comp_funcs ddp_mdp_rsz = {
> +	.clk_enable = mtk_ddp_clk_enable,
> +	.clk_disable = mtk_ddp_clk_disable,
> +	.config = mtk_mdp_rsz_config,
> +};
> +
>  static const struct mtk_ddp_comp_funcs ddp_postmask = {
>  	.clk_enable = mtk_ddp_clk_enable,
>  	.clk_disable = mtk_ddp_clk_disable,
> @@ -456,6 +478,7 @@ static const char * const mtk_ddp_comp_stem[MTK_DDP_COMP_TYPE_MAX] = {
>  	[MTK_DISP_DITHER] = "dither",
>  	[MTK_DISP_DSC] = "dsc",
>  	[MTK_DISP_GAMMA] = "gamma",
> +	[MTK_DISP_MDP_RSZ] = "mdp-rsz",
>  	[MTK_DISP_MERGE] = "merge",
>  	[MTK_DISP_MUTEX] = "mutex",
>  	[MTK_DISP_OD] = "od",
> @@ -515,6 +538,7 @@ static const struct mtk_ddp_comp_match mtk_ddp_matches[DDP_COMPONENT_DRM_ID_MAX]
>  	[DDP_COMPONENT_DSI2]		= { MTK_DSI,			2, &ddp_dsi },
>  	[DDP_COMPONENT_DSI3]		= { MTK_DSI,			3, &ddp_dsi },
>  	[DDP_COMPONENT_GAMMA]		= { MTK_DISP_GAMMA,		0, &ddp_gamma },
> +	[DDP_COMPONENT_MDP_RSZ0]	= { MTK_DISP_MDP_RSZ,		0, &ddp_mdp_rsz},
>  	[DDP_COMPONENT_MERGE0]		= { MTK_DISP_MERGE,		0, &ddp_merge },
>  	[DDP_COMPONENT_MERGE1]		= { MTK_DISP_MERGE,		1, &ddp_merge },
>  	[DDP_COMPONENT_MERGE2]		= { MTK_DISP_MERGE,		2, &ddp_merge },
> diff --git a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> index badb42bd4f7c..87f573fcc903 100644
> --- a/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> +++ b/drivers/gpu/drm/mediatek/mtk_ddp_comp.h
> @@ -36,6 +36,7 @@ enum mtk_ddp_comp_type {
>  	MTK_DISP_OVLSYS_ADAPTOR,
>  	MTK_DISP_OVL_2L,
>  	MTK_DISP_OVL_ADAPTOR,
> +	MTK_DISP_MDP_RSZ,
>  	MTK_DISP_POSTMASK,
>  	MTK_DISP_PWM,
>  	MTK_DISP_RDMA,
> diff --git a/drivers/gpu/drm/mediatek/mtk_drm_drv.c b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> index 70a7e6d06d4f..aa7eec1fc7e6 100644
> --- a/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> +++ b/drivers/gpu/drm/mediatek/mtk_drm_drv.c
> @@ -975,6 +975,8 @@ static const struct of_device_id mtk_ddp_comp_dt_ids[] = {
>  	  .data = (void *)MTK_DSI },
>  	{ .compatible = "mediatek,mt8188-dsi",
>  	  .data = (void *)MTK_DSI },
> +	{ .compatible = "mediatek,mt8196-mdp-rsz",
> +	  .data = (void *)MTK_DISP_MDP_RSZ },
>  	{ }
>  };
>