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Message-ID:
 <TY3PR01MB113467D1EFC9C66CD94D216F3868F2@TY3PR01MB11346.jpnprd01.prod.outlook.com>
Date: Sun, 4 May 2025 13:00:10 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Prabhakar <prabhakar.csengg@...il.com>, Andrzej Hajda
	<andrzej.hajda@...el.com>, Neil Armstrong <neil.armstrong@...aro.org>, Robert
 Foss <rfoss@...nel.org>, laurent.pinchart
	<laurent.pinchart@...asonboard.com>, Jonas Karlman <jonas@...boo.se>, Jernej
 Skrabec <jernej.skrabec@...il.com>, Maarten Lankhorst
	<maarten.lankhorst@...ux.intel.com>, Maxime Ripard <mripard@...nel.org>,
	Thomas Zimmermann <tzimmermann@...e.de>, David Airlie <airlied@...il.com>,
	Simona Vetter <simona@...ll.ch>, Rob Herring <robh@...nel.org>, Krzysztof
 Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, Geert
 Uytterhoeven <geert+renesas@...der.be>, Michael Turquette
	<mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, Philipp Zabel
	<p.zabel@...gutronix.de>, Magnus Damm <magnus.damm@...il.com>
CC: "dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>, Fabrizio Castro
	<fabrizio.castro.jz@...esas.com>, Prabhakar Mahadev Lad
	<prabhakar.mahadev-lad.rj@...renesas.com>
Subject: RE: [PATCH v4 14/15] drm: renesas: rz-du: mipi_dsi: Add support for
 LPCLK handling

Hi Prabhakar,

Thanks for the patch.

> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@...il.com>
> Sent: 30 April 2025 21:41
> Subject: [PATCH v4 14/15] drm: renesas: rz-du: mipi_dsi: Add support for LPCLK handling
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> 
> Introduce the `RZ_MIPI_DSI_FEATURE_LPCLK` feature flag in `rzg2l_mipi_dsi_hw_info` to indicate the
> need for LPCLK configuration.
> 
> On the RZ/V2H(P) SoC, the LPCLK clock rate influences the required DPHY register configuration,
> whereas on the RZ/G2L SoC, this clock is not present. To accommodate this difference, add an `lpclk`
> clock handle in `rzg2l_mipi_dsi` and update the probe function to conditionally acquire LPCLK if the
> SoC supports it.
> 
> Co-developed-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@...esas.com>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> ---
> v3->v4
> - No changes
> 
> v2->v3:
> - No changes
> 
> v1->v2:
> - Added LPCLK as feature flag
> ---
>  drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c b/drivers/gpu/drm/renesas/rz-
> du/rzg2l_mipi_dsi.c
> index df43ff59e08e..22a386ca8ae3 100644
> --- a/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> +++ b/drivers/gpu/drm/renesas/rz-du/rzg2l_mipi_dsi.c
> @@ -30,6 +30,7 @@
> 
>  #define RZ_MIPI_DSI_FEATURE_DPHY_RST	BIT(0)
>  #define RZ_MIPI_DSI_FEATURE_16BPP	BIT(1)
> +#define RZ_MIPI_DSI_FEATURE_LPCLK	BIT(2)
> 
>  struct rzg2l_mipi_dsi;
> 
> @@ -63,6 +64,7 @@ struct rzg2l_mipi_dsi {
>  	struct drm_bridge *next_bridge;
> 
>  	struct clk *vclk;
> +	struct clk *lpclk;
> 
>  	enum mipi_dsi_pixel_format format;
>  	unsigned int num_data_lanes;
> @@ -788,6 +790,12 @@ static int rzg2l_mipi_dsi_probe(struct platform_device *pdev)
>  	if (IS_ERR(dsi->vclk))
>  		return PTR_ERR(dsi->vclk);
> 
> +	if (dsi->info->features & RZ_MIPI_DSI_FEATURE_LPCLK) {
> +		dsi->lpclk = devm_clk_get(dsi->dev, "lpclk");
> +		if (IS_ERR(dsi->lpclk))
> +			return PTR_ERR(dsi->lpclk);
> +	}
> +

Can we use devm_clk_get_optional() and get rid of this Feature bit check
as DT binding check validates for a particular SoC this clk is required or not?
Otherwise, there is no usage for optional API's?

Otherwise LGTM,

Reviewed-by: Biju Das <biju.das.jz@...renesas.com>

Cheers,
Biju

>  	if (dsi->info->features & RZ_MIPI_DSI_FEATURE_DPHY_RST) {
>  		dsi->rstc = devm_reset_control_get_exclusive(dsi->dev, "rst");
>  		if (IS_ERR(dsi->rstc))
> --
> 2.49.0


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