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Message-ID: <260b6cc3-db8b-4b4c-a360-7bdd858943a8@kernel.org>
Date: Sun, 4 May 2025 17:16:39 -0500
From: Dinh Nguyen <dinguyen@...nel.org>
To: "Gerlach, Matthew" <matthew.gerlach@...era.com>, mturquette@...libre.com,
sboyd@...nel.org, richardcochran@...il.com, linux-clk@...r.kernel.org,
netdev@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>,
Teh Wen Ping <wen.ping.teh@...el.com>
Subject: Re: [PATCH v4 RESEND] clk: socfpga: agilex: add support for the Intel
Agilex5
On 5/4/25 16:34, Gerlach, Matthew wrote:
>
>
> On 4/17/2025 7:52 AM, Matthew Gerlach wrote:
>> From: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
>>
>> Add support for Intel's SoCFPGA Agilex5 platform. The clock manager
>> driver for the Agilex5 is very similar to the Agilex platform, so
>> it is reusing most of the Agilex clock driver code.
>>
>> Signed-off-by: Teh Wen Ping <wen.ping.teh@...el.com>
>> Reviewed-by: Dinh Nguyen <dinguyen@...nel.org>
>> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@...el.com>
>> Signed-off-by: Matthew Gerlach <matthew.gerlach@...era.com>
>
> Is there any feedback on this patch?
>
I've applied it and sent a PR for 6.16.
Dinh
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