linux-kernel - Re: [PATCH v4 2/7] clocksource/drivers: Add EcoNet Timer HPT driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Message-ID: <ea17e686-68c7-463c-bb9e-bcc9e59a929d@cjdns.fr>
Date: Tue, 6 May 2025 16:25:41 +0200
From: Caleb James DeLisle <cjd@...ns.fr>
To: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: linux-mips@...r.kernel.org, tglx@...utronix.de, robh@...nel.org,
 krzk+dt@...nel.org, conor+dt@...nel.org, tsbogend@...ha.franken.de,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 benjamin.larsson@...exis.eu, linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH v4 2/7] clocksource/drivers: Add EcoNet Timer HPT driver


On 06/05/2025 10:54, Daniel Lezcano wrote:
> On 05/05/2025 20:09, Caleb James DeLisle wrote:
>>
>> On 05/05/2025 18:36, Daniel Lezcano wrote:
>>> On Wed, Apr 30, 2025 at 01:34:28PM +0000, Caleb James DeLisle wrote:
>>>> Introduce a clocksource driver for the so-called high-precision 
>>>> timer (HPT)
>>>> in the EcoNet EN751221 MIPS SoC.
>>> As a new driver, please document the timer (up - down ?, SPI/PPI, etc
>>> ...) that will help to understand the code more easily, especially the
>>> reg_* functions (purposes?).
>>
>>
>> Sure thing, I can elaborate the comment in the header of
>> timer-econet-en751221.c. Let me know if you'd like it described
>> somewhere else as well, such as the help of config 
>> ECONET_EN751221_TIMER.
>
> It is ok in the changelog, so it is possible to get the description 
> when looking for the patch introducing the new timer.


Sounds good.


>
> [ ... ]
>
>>>> +
>>>> +    cpuhp_setup_state(CPUHP_AP_MIPS_GIC_TIMER_STARTING,
>>>> +              "clockevents/en75/timer:starting",
>>>> +              cevt_init_cpu, NULL);
>>> cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, ... ) ?
>>
>> I see that Ingenic does this. This is the only timer so until it's up,
>> sleeping causes a hang. If sleeping is prior to CPUHP_AP_ONLINE_DYN is
>> considered a bug then this should be okay, but I'm not informed enough
>> to say whether that is the case so I'll follow your guidance here.
>
> Hmm, hard to say without the platform. May be just give a try with 
> CPUHP_AP_ONLINE_DYN to check if it works otherwise stick on 
> CPUHP_AP_MIPS_GIC_TIMER_STARTING as it is already defined ?


I need a little time for this because I only got SMP on this processor

some time ago in a PoC so I'll need to put that back together in order

to validate the change.


Thanks,

Caleb


>
> [ ... ]
>
>