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Message-ID: <20250506-safeguard-brisket-96da510a99d3@spud>
Date: Tue, 6 May 2025 17:30:22 +0100
From: Conor Dooley <conor@...nel.org>
To: Nícolas F. R. A. Prado <nfraprado@...labora.com>
Cc: Lee Jones <lee@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
Alexandre Mergnat <amergnat@...libre.com>,
Amjad Ouled-Ameur <aouledameur@...libre.com>,
Bernhard Rosenkränzer <bero@...libre.com>,
Fabien Parent <fparent@...libre.com>, kernel@...labora.com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org
Subject: Re: [PATCH 1/2] dt-bindings: mfd: syscon: Add
mediatek,mt8365-infracfg-nao
On Fri, May 02, 2025 at 12:43:21PM -0400, Nícolas F. R. A. Prado wrote:
> The register space described by DT node of compatible
> mediatek,mt8365-infracfg-nao exposes a variety of unrelated registers,
> including registers for controlling bus protection on the MT8365 SoC,
> which is used by the power domain controller through a syscon.
>
> Add this compatible to the syscon binding.
>
> Signed-off-by: Nícolas F. R. A. Prado <nfraprado@...labora.com>
Acked-by: Conor Dooley <conor.dooley@...rochip.com>
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