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Message-ID: <20250506220029.2546179-1-robh@kernel.org>
Date: Tue, 6 May 2025 17:00:28 -0500
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
John Crispin <john@...ozen.org>,
Songjun Wu <songjun.wu@...ux.intel.com>
Cc: linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org,
devicetree@...r.kernel.org
Subject: [PATCH] dt-bindings: serial: Convert lantiq,asc to DT schema
Convert the Lantiq SoC ASC UART binding to DT schema. There are no such
clock identifier defines nor a user with clocks, so drop the example
with clocks.
Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
---
.../bindings/serial/lantiq,asc.yaml | 56 +++++++++++++++++++
.../devicetree/bindings/serial/lantiq_asc.txt | 31 ----------
2 files changed, 56 insertions(+), 31 deletions(-)
create mode 100644 Documentation/devicetree/bindings/serial/lantiq,asc.yaml
delete mode 100644 Documentation/devicetree/bindings/serial/lantiq_asc.txt
diff --git a/Documentation/devicetree/bindings/serial/lantiq,asc.yaml b/Documentation/devicetree/bindings/serial/lantiq,asc.yaml
new file mode 100644
index 000000000000..96e8c79cb047
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/lantiq,asc.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/lantiq,asc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Lantiq SoC ASC serial controller
+
+maintainers:
+ - John Crispin <john@...ozen.org>
+ - Songjun Wu <songjun.wu@...ux.intel.com>
+
+allOf:
+ - $ref: /schemas/serial/serial.yaml#
+
+properties:
+ compatible:
+ const: lantiq,asc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description: TX interrupt
+ - description: RX interrupt
+ - description: Error interrupt
+
+ clocks:
+ items:
+ - description: Frequency clock
+ - description: Gate clock
+
+ clock-names:
+ items:
+ - const: freq
+ - const: asc
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/mips-gic.h>
+
+ serial@...00000 {
+ compatible = "lantiq,asc";
+ reg = <0x16600000 0x100000>;
+ interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
+ };
diff --git a/Documentation/devicetree/bindings/serial/lantiq_asc.txt b/Documentation/devicetree/bindings/serial/lantiq_asc.txt
deleted file mode 100644
index 40e81a5818f6..000000000000
--- a/Documentation/devicetree/bindings/serial/lantiq_asc.txt
+++ /dev/null
@@ -1,31 +0,0 @@
-Lantiq SoC ASC serial controller
-
-Required properties:
-- compatible : Should be "lantiq,asc"
-- reg : Address and length of the register set for the device
-- interrupts: the 3 (tx rx err) interrupt numbers. The interrupt specifier
- depends on the interrupt-parent interrupt controller.
-
-Optional properties:
-- clocks: Should contain frequency clock and gate clock
-- clock-names: Should be "freq" and "asc"
-
-Example:
-
-asc0: serial@...00000 {
- compatible = "lantiq,asc";
- reg = <0x16600000 0x100000>;
- interrupt-parent = <&gic>;
- interrupts = <GIC_SHARED 103 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SHARED 105 IRQ_TYPE_LEVEL_HIGH>,
- <GIC_SHARED 106 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;
- clock-names = "freq", "asc";
-};
-
-asc1: serial@...0c00 {
- compatible = "lantiq,asc";
- reg = <0xE100C00 0x400>;
- interrupt-parent = <&icu0>;
- interrupts = <112 113 114>;
-};
--
2.47.2
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