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Message-ID: <20250507124517.GC3339421@horms.kernel.org>
Date: Wed, 7 May 2025 13:45:17 +0100
From: Simon Horman <horms@...nel.org>
To: Tanmay Jagdale <tanmay@...vell.com>
Cc: bbrezillon@...nel.org, arno@...isbad.org, schalla@...vell.com,
herbert@...dor.apana.org.au, davem@...emloft.net,
sgoutham@...vell.com, lcherian@...vell.com, gakula@...vell.com,
jerinj@...vell.com, hkelam@...vell.com, sbhatta@...vell.com,
andrew+netdev@...n.ch, edumazet@...gle.com, kuba@...nel.org,
pabeni@...hat.com, bbhushan2@...vell.com, bhelgaas@...gle.com,
pstanner@...hat.com, gregkh@...uxfoundation.org,
peterz@...radead.org, linux@...blig.org,
krzysztof.kozlowski@...aro.org, giovanni.cabiddu@...el.com,
linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, rkannoth@...vell.com, sumang@...vell.com,
gcherian@...vell.com, Kiran Kumar K <kirankumark@...vell.com>,
Nithin Dabilpuram <ndabilpuram@...vell.com>
Subject: Re: [net-next PATCH v1 07/15] octeontx2-af: Add support for SPI to
SA index translation
On Fri, May 02, 2025 at 06:49:48PM +0530, Tanmay Jagdale wrote:
> From: Kiran Kumar K <kirankumark@...vell.com>
>
> In case of IPsec, the inbound SPI can be random. HW supports mapping
> SPI to an arbitrary SA index. SPI to SA index is done using a lookup
> in NPC cam entry with key as SPI, MATCH_ID, LFID. Adding Mbox API
> changes to configure the match table.
>
> Signed-off-by: Kiran Kumar K <kirankumark@...vell.com>
> Signed-off-by: Nithin Dabilpuram <ndabilpuram@...vell.com>
> Signed-off-by: Sunil Kovvuri Goutham <sgoutham@...vell.com>
> Signed-off-by: Tanmay Jagdale <tanmay@...vell.com>
...
> diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> index 715efcc04c9e..5cebf10a15a7 100644
> --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h
> @@ -326,6 +326,10 @@ M(NIX_READ_INLINE_IPSEC_CFG, 0x8023, nix_read_inline_ipsec_cfg, \
> M(NIX_LF_INLINE_RQ_CFG, 0x8024, nix_lf_inline_rq_cfg, \
> nix_rq_cpt_field_mask_cfg_req, \
> msg_rsp) \
> +M(NIX_SPI_TO_SA_ADD, 0x8026, nix_spi_to_sa_add, nix_spi_to_sa_add_req, \
> + nix_spi_to_sa_add_rsp) \
> +M(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete, nix_spi_to_sa_delete_req, \
> + msg_rsp) \
Please keep line length to 80 columns or less in Networking code,
unless it reduces readability.
In this case perhaps:
M(NIX_SPI_TO_SA_DELETE, 0x8027, nix_spi_to_sa_delete, \
nix_spi_to_sa_delete_req, \
msg_rsp) \
Likewise throughout this patch (set).
checkpatch.pl --max-line-length=80 is your friend.
> M(NIX_MCAST_GRP_CREATE, 0x802b, nix_mcast_grp_create, nix_mcast_grp_create_req, \
> nix_mcast_grp_create_rsp) \
> M(NIX_MCAST_GRP_DESTROY, 0x802c, nix_mcast_grp_destroy, nix_mcast_grp_destroy_req, \
...
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