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Message-Id: <20250507-rk3576-sige5-usb-v3-0-89bf5a614ccf@collabora.com>
Date: Wed, 07 May 2025 15:07:20 +0200
From: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
To: Vinod Koul <vkoul@...nel.org>,
Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Heiko Stuebner <heiko@...ech.de>,
Kever Yang <kever.yang@...k-chips.com>,
Frank Wang <frank.wang@...k-chips.com>
Cc: Sebastian Reichel <sebastian.reichel@...labora.com>,
kernel@...labora.com, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-rockchip@...ts.infradead.org, linux-kernel@...r.kernel.org,
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
Subject: [PATCH v3 0/4] RK3576 USB Enablement
This series is the result of what I thought would be a quick 10 minute
job, but turned out to be more like 3 days of pain, suffering, and
confusion. This should be expected with USB Type C though.
The first patch in the series extends the inno usb2 PHY driver to fiddle
with some GRF flags in that driver when the PHY is connected to a USB
Type C port. Without this change, devices on USB-C simply don't
enumerate at all, as the state machine gets stuck waiting for vbus to go
low or something along those lines.
An alternate way to implement this would've been a vendor property in
the PHY binding which is then checked for in the driver and needs to be
present in all rockchip inno u2phy instances that happen to be connected
to a USB Type C connector. This is what downstream does, for example.
Patch 2 and 3 allow Super Speed in reverse orientation on USB Type-C
connectors to work, but I am not entirely confident in the solution I
arrived at.
Patch 4 adds the USB related nodes, including associated regulators and
Type C controllers, to the Sige5 tree.
Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
---
Changes in v3:
- Drop the utmi clock patch. This was always a speculative fix for a
problem I could no longer reproduce, and it doesn't conform to the
binding, as Robo-rob correctly caught.
- Link to v2: https://lore.kernel.org/r/20250505-rk3576-sige5-usb-v2-0-d5ba4305f3be@collabora.com
Changes in v2:
- Rebased onto next-20250505
- Drop the u2susphy quirk, as I can no longer reproduce the original
problem with various amounts of ripping up the DT and changing the
config. Yeah I'm not super hyped about this now being a heisenbug
either.
- Drop the bindings patch, as Rob showed me there's a way to do this
without extending the bindings
- Rewrite the usb 2 phy driver patch to no longer walk an OF graph from
PHY to connector, but instead first find the USB controller that uses
this PHY, and then use the USB controller's existing graph connection
to the usb connector.
- Adjust the Sige5 DTS patch to now have two port connections from the
USB connector to the drd0 USB controller, one for high-speed aka
USB2, one for super-speed aka USB3, ordered as per its binding.
- Add a patch for rk3576.dtsi to reference u2phy1 as a clock in the drd1
controller.
- Add two patches to fix USB Type-C super speed in reverse orientation.
- Link to v1: https://lore.kernel.org/r/20250407-rk3576-sige5-usb-v1-0-67eec166f82f@collabora.com
---
Nicolas Frattaroli (4):
phy: rockchip: inno-usb2: add soft vbusvalid control
phy: rockchip: usbdp: move orientation handling further down
phy: rockchip: usbdp: reset USB3 and reinit on orientation switch
arm64: dts: rockchip: enable USB on Sige5
.../boot/dts/rockchip/rk3576-armsom-sige5.dts | 160 +++++++++++++++++++++
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 113 ++++++++++++++-
drivers/phy/rockchip/phy-rockchip-usbdp.c | 154 +++++++++++++-------
3 files changed, 373 insertions(+), 54 deletions(-)
---
base-commit: 214464d4c3491d4eb2c0e9d1310d7f60c408b94b
change-id: 20250328-rk3576-sige5-usb-230102aeeaca
Best regards,
--
Nicolas Frattaroli <nicolas.frattaroli@...labora.com>
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