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Message-ID: <a37abb53e540f3375706a6d6877323ba950ee6e3.1746627307.git.sandipan.das@amd.com>
Date: Wed, 7 May 2025 19:58:28 +0530
From: Sandipan Das <sandipan.das@....com>
To: <linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: Peter Zijlstra <peterz@...radead.org>, Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>, Namhyung Kim
<namhyung@...nel.org>, Mark Rutland <mark.rutland@....com>, "Alexander
Shishkin" <alexander.shishkin@...ux.intel.com>, Jiri Olsa <jolsa@...nel.org>,
Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
"Kan Liang" <kan.liang@...ux.intel.com>, Stephane Eranian
<eranian@...gle.com>, Ravi Bangoria <ravi.bangoria@....com>, Ananth Narayan
<ananth.narayan@....com>, Sandipan Das <sandipan.das@....com>,
<stable@...r.kernel.org>
Subject: [PATCH 2/3] perf vendor events amd: Remove Zen 5 TLB flush event
As mentioned in Erratum 1569 from the Revision Guide for AMD Family 1Ah
Models 00h-0Fh Processors available at the link below, PMCx078 reports
incorrect information about TLB flushes on Zen 5 processors. Remove
affected events and metrics.
Link: https://bugzilla.kernel.org/attachment.cgi?id=308095
Fixes: 45c072f2537a ("perf vendor events amd: Add Zen 5 core events")
Signed-off-by: Sandipan Das <sandipan.das@....com>
Cc: stable@...r.kernel.org
---
tools/perf/pmu-events/arch/x86/amdzen5/load-store.json | 6 ------
tools/perf/pmu-events/arch/x86/amdzen5/recommended.json | 7 -------
2 files changed, 13 deletions(-)
diff --git a/tools/perf/pmu-events/arch/x86/amdzen5/load-store.json b/tools/perf/pmu-events/arch/x86/amdzen5/load-store.json
index ff6627a77805..f23a92bf55ac 100644
--- a/tools/perf/pmu-events/arch/x86/amdzen5/load-store.json
+++ b/tools/perf/pmu-events/arch/x86/amdzen5/load-store.json
@@ -502,12 +502,6 @@
"EventCode": "0x76",
"BriefDescription": "Core cycles not in halt."
},
- {
- "EventName": "ls_tlb_flush.all",
- "EventCode": "0x78",
- "BriefDescription": "All TLB Flushes.",
- "UMask": "0xff"
- },
{
"EventName": "ls_not_halted_p0_cyc.p0_freq_cyc",
"EventCode": "0x120",
diff --git a/tools/perf/pmu-events/arch/x86/amdzen5/recommended.json b/tools/perf/pmu-events/arch/x86/amdzen5/recommended.json
index 863f4b5dfc14..6b32308b1c3a 100644
--- a/tools/perf/pmu-events/arch/x86/amdzen5/recommended.json
+++ b/tools/perf/pmu-events/arch/x86/amdzen5/recommended.json
@@ -241,13 +241,6 @@
"MetricGroup": "tlb",
"ScaleUnit": "1e3per_1k_instr"
},
- {
- "MetricName": "all_tlbs_flushed_pti",
- "BriefDescription": "All TLBs flushed per thousand instructions.",
- "MetricExpr": "ls_tlb_flush.all / instructions",
- "MetricGroup": "tlb",
- "ScaleUnit": "1e3per_1k_instr"
- },
{
"MetricName": "macro_ops_dispatched",
"BriefDescription": "Macro-ops dispatched.",
--
2.43.0
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