linux-kernel - Re: [PATCH v3 3/3] PCI: aardvark: Remove redundant MPS configuration

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Message-ID: <ff6abbf6-e464-4929-96e6-16e43c62db06@163.com>
Date: Wed, 7 May 2025 23:06:51 +0800
From: Hans Zhang <18255117159@....com>
To: Pali Rohár <pali@...nel.org>
Cc: lpieralisi@...nel.org, kw@...ux.com, bhelgaas@...gle.com,
 heiko@...ech.de, manivannan.sadhasivam@...aro.org, yue.wang@...ogic.com,
 neil.armstrong@...aro.org, robh@...nel.org, jingoohan1@...il.com,
 khilman@...libre.com, jbrunet@...libre.com,
 martin.blumenstingl@...glemail.com, linux-pci@...r.kernel.org,
 linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
 linux-amlogic@...ts.infradead.org, linux-rockchip@...ts.infradead.org
Subject: Re: [PATCH v3 3/3] PCI: aardvark: Remove redundant MPS configuration



On 2025/5/7 23:03, Hans Zhang wrote:
> 
> 
> On 2025/5/7 01:41, Pali Rohár wrote:
>> On Wednesday 07 May 2025 01:34:39 Hans Zhang wrote:
>>> The Aardvark PCIe controller enforces a fixed 512B payload size via
>>> PCI_EXP_DEVCTL_PAYLOAD_512B, overriding hardware capabilities and PCIe
>>> core negotiations.
>>>
>>> Remove explicit MPS overrides (PCI_EXP_DEVCTL_PAYLOAD and
>>> PCI_EXP_DEVCTL_PAYLOAD_512B). MPS is now determined by the PCI core
>>> during device initialization, leveraging root port configurations and
>>> device-specific capabilities.
>>>
>>> Aligning Aardvark with the unified MPS framework ensures consistency,
>>> avoids artificial constraints, and allows the hardware to operate at
>>> its maximum supported payload size while adhering to PCIe 
>>> specifications.
>>>
>>> Signed-off-by: Hans Zhang <18255117159@....com>
>>> ---
>>>   drivers/pci/controller/pci-aardvark.c | 2 --
>>>   1 file changed, 2 deletions(-)
>>>
>>> diff --git a/drivers/pci/controller/pci-aardvark.c 
>>> b/drivers/pci/controller/pci-aardvark.c
>>> index a29796cce420..d8852892994a 100644
>>> --- a/drivers/pci/controller/pci-aardvark.c
>>> +++ b/drivers/pci/controller/pci-aardvark.c
>>> @@ -549,9 +549,7 @@ static void advk_pcie_setup_hw(struct advk_pcie 
>>> *pcie)
>>>       reg = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
>>>       reg &= ~PCI_EXP_DEVCTL_RELAX_EN;
>>>       reg &= ~PCI_EXP_DEVCTL_NOSNOOP_EN;
>>> -    reg &= ~PCI_EXP_DEVCTL_PAYLOAD;
>>>       reg &= ~PCI_EXP_DEVCTL_READRQ;
>>> -    reg |= PCI_EXP_DEVCTL_PAYLOAD_512B;
>>>       reg |= PCI_EXP_DEVCTL_READRQ_512B;
>>>       advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);
>>> -- 
>>> 2.25.1
>>>
>>
>> Please do not remove this code. It is required part of the
>> initialization of the aardvark PCI controller at the specific phase,
>> as defined in the Armada 3700 Functional Specification.
>>
>> There were reported more issues with those Armada PCIe controllers for
>> which were already sent patches to mailing list in last 5 years. But
>> unfortunately not all fixes were taken / applied yet.
> 
> Hi Pali,
> 
> I replied to you in version v2.
> 
> Is the maximum MPS supported by Armada 3700 512 bytes? What are the 
> default values of DevCap.MPS and DevCtl.MPS?
> 
> Because the default value of DevCtl.MPS is not 512 bytes, it needs to be 
> configured here, right?
> 
> If it's my guess, RK3588 also has the same requirements as you, just 
> like the first patch I submitted.
> 
> Please take a look at the communication history:
> https://patchwork.kernel.org/project/linux-pci/patch/20250416151926.140202-1-18255117159@163.com/
And this:
https://patchwork.kernel.org/project/linux-pci/patch/20250425095708.32662-2-18255117159@163.com/

> 
> Please test it using patch 1/3 of this series. If there are any 
> problems, please let me know.
> 
> 
> Best regards,
> Hans