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Message-ID: <d08adb1c-6db5-45d1-9eb7-dce19bc7158e@arm.com>
Date: Wed, 7 May 2025 09:47:09 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: Ada Couprie Diaz <ada.coupriediaz@....com>,
 linux-arm-kernel@...ts.infradead.org
Cc: Catalin Marinas <catalin.marinas@....com>, Will Deacon <will@...nel.org>,
 Mark Rutland <mark.rutland@....com>, linux-arm-kernel@...ts.infradead.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64/debug: Drop redundant DBG_MDSCR_* macros

On 5/6/25 18:40, Ada Couprie Diaz wrote:
> Hi Anshuman,
> 
> On 17/04/2025 11:52, Anshuman Khandual wrote:
>> MDSCR_EL1 has already been defined in tools sysreg format and hence can be
>> used in all debug monitor related call paths. Subsequently all DBG_MDSCR_*
>> macros become redundant and hence can be dropped off completely. While here
>> convert all variables handling MDSCR_EL1 register as u64 which reflects its
>> true width as well.
>>
>> Cc: Catalin Marinas <catalin.marinas@....com>
>> Cc: Will Deacon <will@...nel.org>
>> Cc: Mark Rutland <mark.rutland@....com>
>> Cc: linux-arm-kernel@...ts.infradead.org
>> Cc: linux-kernel@...r.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
>> ---
> 
> I think the changes make sense, even more so given that `kvm/debug.c` already uses the sysreg format definition for MDSCR_EL1.

> 
> It looks good to me, but I think there is a missing conversion to 64 bits below.
> Would it make sense to convert the two instances of MDSCR_EL1 used in `tools/testing/selftests/kvm/arm64/debug-exceptions.c`, in `enable_monitor_debug_exceptions()` and `install_ss()` , to 64 bits as well ? (They don't rely on `DBG_MDSCR_*`, the test defines its own macros)

Sure, will do the necessary changes.

> 
>> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
>> index b260ddc4d3e9..6dbfc1008007 100644
>> --- a/arch/arm64/kernel/entry-common.c
>> +++ b/arch/arm64/kernel/entry-common.c
>> @@ -354,7 +354,7 @@ static void cortex_a76_erratum_1463225_svc_handler(void)
>>         __this_cpu_write(__in_cortex_a76_erratum_1463225_wa, 1);
>>       reg = read_sysreg(mdscr_el1);
>> -    val = reg | DBG_MDSCR_SS | DBG_MDSCR_KDE;
>> +    val = reg | MDSCR_EL1_SS | MDSCR_EL1_KDE;
>>       write_sysreg(val, mdscr_el1);
>>       asm volatile("msr daifclr, #8");
>>       isb();
> 
> Given the change of width to 64 bits elsewhere, shouldn't we change val and reg to u64 here as well ?

Sure, will fold this in as well.
> 
> diff --git a/arch/arm64/kernel/entry-common.c b/arch/arm64/kernel/entry-common.c
> index 73cf6a5f41d8..d61a5ddf53d6 100644
> --- a/arch/arm64/kernel/entry-common.c
> +++ b/arch/arm64/kernel/entry-common.c
> @@ -344,7 +344,7 @@ static DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa);
>  
>  static void cortex_a76_erratum_1463225_svc_handler(void)
>  {
> -    u32 reg, val;
> +    u64 reg, val;
>  
>      if (!unlikely(test_thread_flag(TIF_SINGLESTEP)))
>          return;

Thanks for your review.

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