linux-kernel - Re: [PATCH 4/7] clk: renesas: r9a08g045: Drop power domain instantiation

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Message-ID: <CAMuHMdVpy=89g0=-U4E4Kg=M_gS96RP26xDj_mUp=Lb1sjOHMg@mail.gmail.com>
Date: Wed, 7 May 2025 19:10:34 +0200
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: Claudiu <claudiu.beznea@...on.dev>
Cc: mturquette@...libre.com, sboyd@...nel.org, robh@...nel.org, 
	krzk+dt@...nel.org, conor+dt@...nel.org, magnus.damm@...il.com, 
	linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: Re: [PATCH 4/7] clk: renesas: r9a08g045: Drop power domain instantiation

Hi Claudiu,

On Thu, 10 Apr 2025 at 16:06, Claudiu <claudiu.beznea@...on.dev> wrote:
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
>
> Since the configuration order between the individual MSTOP and CLKON bits
> cannot be preserved with the power domain abstraction, drop the power
> domain instantiations.
>
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>

Thanks for your patch!

> --- a/drivers/clk/renesas/r9a08g045-cpg.c
> +++ b/drivers/clk/renesas/r9a08g045-cpg.c
> @@ -192,59 +192,105 @@ static const struct cpg_core_clk r9a08g045_core_clks[] __initconst = {
>  };
>
>  static const struct rzg2l_mod_clk r9a08g045_mod_clks[] = {

> +       DEF_MOD("dmac_aclk",            R9A08G045_DMAC_ACLK, R9A08G045_CLK_P3, 0x52c, 0,
> +                                       MSTOP(BUS_REG1, BIT(2))),
> +       DEF_MOD("dmac_pclk",            R9A08G045_DMAC_PCLK, CLK_P3_DIV2, 0x52c, 1,
> +                                       MSTOP(BUS_REG1, BIT(3))),

The documentation is not very clear about the mapping to the 4 MSTOP
bits related to DMA. Can you enlighten me?

> @@ -294,78 +340,6 @@ static const unsigned int r9a08g045_crit_mod_clks[] __initconst = {
>         MOD_CLK_BASE + R9A08G045_VBAT_BCLK,
>  };
>
> -static const struct rzg2l_cpg_pm_domain_init_data r9a08g045_pm_domains[] = {
> -       /* Keep always-on domain on the first position for proper domains registration. */
> -       DEF_PD("always-on",     R9A08G045_PD_ALWAYS_ON,
> -                               DEF_REG_CONF(0, 0),
> -                               GENPD_FLAG_ALWAYS_ON | GENPD_FLAG_IRQ_SAFE),
> -       DEF_PD("gic",           R9A08G045_PD_GIC,
> -                               DEF_REG_CONF(CPG_BUS_ACPU_MSTOP, BIT(3)),
> -                               GENPD_FLAG_ALWAYS_ON),
> -       DEF_PD("ia55",          R9A08G045_PD_IA55,
> -                               DEF_REG_CONF(CPG_BUS_PERI_CPU_MSTOP, BIT(13)),
> -                               GENPD_FLAG_ALWAYS_ON),
> -       DEF_PD("dmac",          R9A08G045_PD_DMAC,
> -                               DEF_REG_CONF(CPG_BUS_REG1_MSTOP, GENMASK(3, 0)),
> -                               GENPD_FLAG_ALWAYS_ON),

[...]

> -       DEF_PD("rtc",           R9A08G045_PD_RTC,
> -                               DEF_REG_CONF(CPG_BUS_MCPU3_MSTOP, BIT(7)), 0),

These MSTOP bits are no longer controlled. Is that intentional?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds