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Message-ID: <CAO9ioeXCO+8wSs-6yjTDOu8pSw___spEX_JPrUNKq3iPDjWQDQ@mail.gmail.com>
Date: Wed, 7 May 2025 20:29:46 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Rob Clark <robdclark@...il.com>
Cc: Abhinav Kumar <quic_abhinavk@...cinc.com>,
Dmitry Baryshkov <lumag@...nel.org>, Sean Paul <sean@...rly.run>,
Marijn Suijten <marijn.suijten@...ainline.org>,
David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 10/11] drm/msm: enable separate binding of GPU and
display devices
On Wed, 7 May 2025 at 19:43, Rob Clark <robdclark@...il.com> wrote:
>
> On Sat, May 3, 2025 at 12:17 AM Dmitry Baryshkov
> <dmitry.baryshkov@....qualcomm.com> wrote:
> >
> > There are cases when we want to have separate DRM devices for GPU and
> > display pipelines.
> > One example is development, when it is beneficial to be able to bind the
> > GPU driver separately, without the display pipeline (and without the
> > hacks adding "amd,imageon" to the compatible string).
> > Another example is some of Qualcomm platforms, which have two MDSS
> > units, but only one GPU. With current approach it is next to impossible
> > to support this usecase properly, while separate binding allows users to
> > have three DRM devices: two for MDSS units and a single headless GPU.
> >
> > Add kernel param msm.separate_gpu_drm, which if set to true forces
> > creation of separate display and GPU DRM devices. Mesa supports this
> > setup by using the kmsro wrapper.
> >
> > The param is disabled by default, in order to be able to test userspace
> > for the compatibility issues. Simple clients are able to handle this
> > setup automatically.
> >
> > Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
> > ---
> > drivers/gpu/drm/msm/adreno/adreno_device.c | 3 +-
> > drivers/gpu/drm/msm/msm_drv.c | 49 +++++++++++++++++++++++++++---
> > drivers/gpu/drm/msm/msm_drv.h | 2 ++
> > 3 files changed, 49 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/msm/adreno/adreno_device.c b/drivers/gpu/drm/msm/adreno/adreno_device.c
> > index 325cb710ea08ac8e5c3d9c80c8d8e18e1946e994..2322a3301a5226c4e2590344e4744934addeea33 100644
> > --- a/drivers/gpu/drm/msm/adreno/adreno_device.c
> > +++ b/drivers/gpu/drm/msm/adreno/adreno_device.c
> > @@ -243,7 +243,8 @@ static const struct component_ops a3xx_ops = {
> >
> > static int adreno_probe(struct platform_device *pdev)
> > {
> > - if (of_device_is_compatible(pdev->dev.of_node, "amd,imageon"))
> > + if (of_device_is_compatible(pdev->dev.of_node, "amd,imageon") ||
> > + msm_gpu_no_components())
> > return msm_gpu_probe(pdev, &a3xx_ops);
> >
> > return component_add(&pdev->dev, &a3xx_ops);
> > diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
> > index 804b594ba1e7df9d9aec53a9be1451f1167fc77a..eec7501eb05b6c31ffd9dc5a7ba430e3284ea5ed 100644
> > --- a/drivers/gpu/drm/msm/msm_drv.c
> > +++ b/drivers/gpu/drm/msm/msm_drv.c
> > @@ -59,9 +59,18 @@ static bool modeset = true;
> > MODULE_PARM_DESC(modeset, "Use kernel modesetting [KMS] (1=on (default), 0=disable)");
> > module_param(modeset, bool, 0600);
> >
> > +static bool separate_gpu_drm;
> > +MODULE_PARM_DESC(separate_gpu_drm, "Use separate DRM device for the GPU (0=single DRM device for both GPU and display (default), 1=two DRM devices)");
> > +module_param(separate_gpu_drm, bool, 0400);
> > +
> > DECLARE_FAULT_ATTR(fail_gem_alloc);
> > DECLARE_FAULT_ATTR(fail_gem_iova);
> >
> > +bool msm_gpu_no_components(void)
> > +{
> > + return separate_gpu_drm;
> > +}
> > +
> > static int msm_drm_uninit(struct device *dev, const struct component_ops *gpu_ops)
> > {
> > struct platform_device *pdev = to_platform_device(dev);
> > @@ -898,6 +907,32 @@ static const struct drm_driver msm_driver = {
> > .patchlevel = MSM_VERSION_PATCHLEVEL,
> > };
> >
> > +static const struct drm_driver msm_kms_driver = {
> > + .driver_features = DRIVER_GEM |
> > + DRIVER_ATOMIC |
> > + DRIVER_MODESET |
> > + DRIVER_SYNCOBJ_TIMELINE |
> > + DRIVER_SYNCOBJ,
>
> I think, drop DRIVER_SYNCOBJ + DRIVER_SYNCOBJ_TIMELINE, since kms only
> uses fence fd's.
Ack.
> (Syncobj support is only in the SUBMIT and upcoming
> VM_BIND ioctls.. I don't think there is a use-case for being able to
> create syncobjs for KMS only drivers, and it doesn't look like any of
> the other kms-only drivers support this.)
>
> Alternatively, we could use drm_device::driver_features to mask
> certain drm_driver::driver_features at runtime.. that would be a way
> to avoid having separate drm_driver tables.
Not really and that's a problem. DRIVER_RENDER is processed before
driver_features can take place.
Also, the "msm-kms" name is required to prevent userspace from using
it for GPU tasks.
So, at least a KMS-only structure needs to be present.
>
> BR,
> -R
>
> > + .open = msm_open,
> > + .postclose = msm_postclose,
> > + .dumb_create = msm_gem_dumb_create,
> > + .dumb_map_offset = msm_gem_dumb_map_offset,
> > + .gem_prime_import_sg_table = msm_gem_prime_import_sg_table,
> > +#ifdef CONFIG_DEBUG_FS
> > + .debugfs_init = msm_debugfs_init,
> > +#endif
> > + MSM_FBDEV_DRIVER_OPS,
> > + .show_fdinfo = msm_show_fdinfo,
> > + .ioctls = msm_ioctls,
> > + .num_ioctls = ARRAY_SIZE(msm_ioctls),
> > + .fops = &fops,
> > + .name = "msm-kms",
> > + .desc = "MSM Snapdragon DRM",
> > + .major = MSM_VERSION_MAJOR,
> > + .minor = MSM_VERSION_MINOR,
> > + .patchlevel = MSM_VERSION_PATCHLEVEL,
> > +};
> > +
> > static const struct drm_driver msm_gpu_driver = {
> > .driver_features = DRIVER_GEM |
> > DRIVER_RENDER |
> > @@ -1044,7 +1079,11 @@ static int add_gpu_components(struct device *dev,
> >
> > static int msm_drm_bind(struct device *dev)
> > {
> > - return msm_drm_init(dev, &msm_driver, NULL);
> > + return msm_drm_init(dev,
> > + msm_gpu_no_components() ?
> > + &msm_kms_driver :
> > + &msm_driver,
> > + NULL);
> > }
> >
> > static void msm_drm_unbind(struct device *dev)
> > @@ -1080,9 +1119,11 @@ int msm_drv_probe(struct device *master_dev,
> > return ret;
> > }
> >
> > - ret = add_gpu_components(master_dev, &match);
> > - if (ret)
> > - return ret;
> > + if (!msm_gpu_no_components()) {
> > + ret = add_gpu_components(master_dev, &match);
> > + if (ret)
> > + return ret;
> > + }
> >
> > /* on all devices that I am aware of, iommu's which can map
> > * any address the cpu can see are used:
> > diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
> > index e7d8715bc61ccdee822bc6a1a0b0bbe7c8ff3552..1ff799f0c78133e73c6857e3692c2dca2c5e60fa 100644
> > --- a/drivers/gpu/drm/msm/msm_drv.h
> > +++ b/drivers/gpu/drm/msm/msm_drv.h
> > @@ -543,4 +543,6 @@ void msm_kms_shutdown(struct platform_device *pdev);
> >
> > bool msm_disp_drv_should_bind(struct device *dev, bool dpu_driver);
> >
> > +bool msm_gpu_no_components(void);
> > +
> > #endif /* __MSM_DRV_H__ */
> >
> > --
> > 2.39.5
> >
--
With best wishes
Dmitry
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