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Message-ID: <174664324585.406.10812098910624084030.tip-bot2@tip-bot2>
Date: Wed, 07 May 2025 18:40:45 -0000
From: "tip-bot2 for Ingo Molnar" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: kernel test robot <lkp@...el.com>, Ingo Molnar <mingo@...nel.org>,
Johannes Berg <johannes.berg@...el.com>, x86@...nel.org,
linux-kernel@...r.kernel.org
Subject: [tip: x86/msr] um: Add UML version of <asm/tsc.h> to define rdtsc()
The following commit has been merged into the x86/msr branch of tip:
Commit-ID: 24b58adaa7508d9d2cdb6bca44803954baf24459
Gitweb: https://git.kernel.org/tip/24b58adaa7508d9d2cdb6bca44803954baf24459
Author: Ingo Molnar <mingo@...nel.org>
AuthorDate: Wed, 07 May 2025 20:18:22 +02:00
Committer: Ingo Molnar <mingo@...nel.org>
CommitterDate: Wed, 07 May 2025 20:30:39 +02:00
um: Add UML version of <asm/tsc.h> to define rdtsc()
In the x86 tree rdtsc() methods got moved out of <asm/msr.h>, but this
broke UML, as the x86 version of <asm/tsc.h> cannot be used by UML as-is:
CC [M] drivers/accel/habanalabs/common/habanalabs_ioctl.o
In file included from drivers/accel/habanalabs/common/habanalabs_ioctl.c:20:
./arch/x86/include/asm/tsc.h:70:28: error: conflicting types for ‘cycles_t’; have ‘long long unsigned int’
70 | typedef unsigned long long cycles_t;
| ^~~~~~~~
In file included from ./arch/um/include/asm/timex.h:7,
from ./include/linux/timex.h:67,
from ./include/linux/time32.h:13,
from ./include/linux/time.h:60,
from ./include/linux/skbuff.h:15,
from ./include/linux/if_ether.h:19,
from ./include/linux/habanalabs/cpucp_if.h:12,
from drivers/accel/habanalabs/common/habanalabs.h:11,
from drivers/accel/habanalabs/common/habanalabs_ioctl.c:11:
./include/asm-generic/timex.h:8:23: note: previous declaration of ‘cycles_t’ with type ‘cycles_t’ {aka ‘long unsigned int’}
8 | typedef unsigned long cycles_t;
| ^~~~~~~~
To resolve these kinds of problems and to allow <asm/tsc.h> to be included on UML,
add a simplified version of <asm/tsc.h>, which only adds the rdtsc() definition.
Reported-by: kernel test robot <lkp@...el.com>
Signed-off-by: Ingo Molnar <mingo@...nel.org>
Cc: Johannes Berg <johannes.berg@...el.com>
Link: https://lore.kernel.org/r/202505080003.0t7ewxGp-lkp@intel.com
---
arch/um/include/asm/tsc.h | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)
create mode 100644 arch/um/include/asm/tsc.h
diff --git a/arch/um/include/asm/tsc.h b/arch/um/include/asm/tsc.h
new file mode 100644
index 0000000..a52b0e4
--- /dev/null
+++ b/arch/um/include/asm/tsc.h
@@ -0,0 +1,25 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+#ifndef _ASM_UM_TSC_H
+#define _ASM_UM_TSC_H
+
+#include <asm/asm.h>
+
+/**
+ * rdtsc() - returns the current TSC without ordering constraints
+ *
+ * rdtsc() returns the result of RDTSC as a 64-bit integer. The
+ * only ordering constraint it supplies is the ordering implied by
+ * "asm volatile": it will put the RDTSC in the place you expect. The
+ * CPU can and will speculatively execute that RDTSC, though, so the
+ * results can be non-monotonic if compared on different CPUs.
+ */
+static __always_inline u64 rdtsc(void)
+{
+ EAX_EDX_DECLARE_ARGS(val, low, high);
+
+ asm volatile("rdtsc" : EAX_EDX_RET(val, low, high));
+
+ return EAX_EDX_VAL(val, low, high);
+}
+
+#endif /* _ASM_UM_TSC_H */
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