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Message-ID: <20250507193539.GPaBu2C_Gt7ksvRHoc@fat_crate.local>
Date: Wed, 7 May 2025 21:35:39 +0200
From: Borislav Petkov <bp@...en8.de>
To: Yazen Ghannam <yazen.ghannam@....com>
Cc: x86@...nel.org, Tony Luck <tony.luck@...el.com>,
linux-kernel@...r.kernel.org, linux-edac@...r.kernel.org,
Smita.KoralahalliChannabasappa@....com,
Qiuxu Zhuo <qiuxu.zhuo@...el.com>
Subject: Re: [PATCH v3 14/17] x86/mce/amd: Enable interrupt vectors once
per-CPU on SMCA systems
On Tue, Apr 15, 2025 at 02:55:09PM +0000, Yazen Ghannam wrote:
> -static void deferred_error_interrupt_enable(struct cpuinfo_x86 *c)
> -{
> - u32 low = 0, high = 0;
> - int def_offset = -1, def_new;
> -
> - if (rdmsr_safe(MSR_CU_DEF_ERR, &low, &high))
> - return;
> -
> - def_new = (low & MASK_DEF_LVTOFF) >> 4;
> - if (!(low & MASK_DEF_LVTOFF)) {
> - pr_err(FW_BUG "Your BIOS is not setting up LVT offset 0x2 for deferred error IRQs correctly.\n");
I'm not sure why it is ok to remove that one.
/me goes and digs into lore...
Here's why we did it back then:
https://lore.kernel.org/all/5547906E.3060701@amd.com/
and apparently that was for some bulldozer BIOS.
How can we trust Zen BIOS all of a sudden?
;-)
--
Regards/Gruss,
Boris.
https://people.kernel.org/tglx/notes-about-netiquette
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