| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-ID: <CAJZ5v0jXJtVgEPg7+3-YRkntLzk0kVPkXxKkL_kQpDU_RSsZtg@mail.gmail.com>
Date: Wed, 7 May 2025 22:09:46 +0200
From: "Rafael J. Wysocki" <rafael@...nel.org>
To: Roman Kisel <romank@...ux.microsoft.com>
Cc: ardb@...nel.org, bp@...en8.de, brgerst@...il.com,
dave.hansen@...ux.intel.com, decui@...rosoft.com, dimitri.sivanich@....com,
gautham.shenoy@....com, haiyangz@...rosoft.com, hpa@...or.com,
imran.f.khan@...cle.com, jacob.jun.pan@...ux.intel.com, jpoimboe@...nel.org,
justin.ernst@....com, kprateek.nayak@....com, kyle.meyer@....com,
kys@...rosoft.com, lenb@...nel.org, mhklinux@...look.com, mingo@...hat.com,
nikunj@....com, papaluri@....com, patryk.wlazlyn@...ux.intel.com,
peterz@...radead.org, rafael@...nel.org, russ.anderson@....com,
sohil.mehta@...el.com, steve.wahl@....com, tglx@...utronix.de,
thomas.lendacky@....com, tiala@...rosoft.com, wei.liu@...nel.org,
yuehaibing@...wei.com, linux-acpi@...r.kernel.org,
linux-hyperv@...r.kernel.org, linux-kernel@...r.kernel.org, x86@...nel.org,
apais@...rosoft.com, benhill@...rosoft.com, bperkins@...rosoft.com,
sunilmut@...rosoft.com
Subject: Re: [PATCH hyperv-next 2/2] arch/x86: Provide the CPU number in the
wakeup AP callback
On Wed, May 7, 2025 at 8:22 PM Roman Kisel <romank@...ux.microsoft.com> wrote:
>
> When starting APs, confidential guests and paravisor guests
> need to know the CPU number, and the pattern of using the linear
> search has emerged in several places. With N processors that leads
> to the O(N^2) time complexity.
>
> Provide the CPU number in the AP wake up callback so that one can
> get the CPU number in constant time.
>
> Suggested-by: Michael Kelley <mhklinux@...look.com>
> Signed-off-by: Roman Kisel <romank@...ux.microsoft.com>
> Reviewed-by: Tom Lendacky <thomas.lendacky@....com>
> Reviewed-by: Thomas Gleixner <tglx@...utronix.de>
> Reviewed-by: Michael Kelley <mhklinux@...look.com>
For the ACPI bits
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@...el.com>
and I'm assuming that the x86 folks will take care of this.
Thanks!
> ---
> arch/x86/coco/sev/core.c | 13 ++-----------
> arch/x86/hyperv/hv_vtl.c | 12 ++----------
> arch/x86/hyperv/ivm.c | 15 ++-------------
> arch/x86/include/asm/apic.h | 8 ++++----
> arch/x86/include/asm/mshyperv.h | 5 +++--
> arch/x86/kernel/acpi/madt_wakeup.c | 2 +-
> arch/x86/kernel/apic/apic_noop.c | 8 +++++++-
> arch/x86/kernel/apic/apic_numachip.c | 2 +-
> arch/x86/kernel/apic/x2apic_uv_x.c | 2 +-
> arch/x86/kernel/smpboot.c | 10 +++++-----
> 10 files changed, 28 insertions(+), 49 deletions(-)
>
> diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
> index b0c1a7a57497..7780d55d1833 100644
> --- a/arch/x86/coco/sev/core.c
> +++ b/arch/x86/coco/sev/core.c
> @@ -1177,7 +1177,7 @@ static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa, int apic_id)
> free_page((unsigned long)vmsa);
> }
>
> -static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
> +static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip, unsigned int cpu)
> {
> struct sev_es_save_area *cur_vmsa, *vmsa;
> struct ghcb_state state;
> @@ -1185,7 +1185,7 @@ static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
> unsigned long flags;
> struct ghcb *ghcb;
> u8 sipi_vector;
> - int cpu, ret;
> + int ret;
> u64 cr4;
>
> /*
> @@ -1206,15 +1206,6 @@ static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
>
> /* Override start_ip with known protected guest start IP */
> start_ip = real_mode_header->sev_es_trampoline_start;
> -
> - /* Find the logical CPU for the APIC ID */
> - for_each_present_cpu(cpu) {
> - if (arch_match_cpu_phys_id(cpu, apic_id))
> - break;
> - }
> - if (cpu >= nr_cpu_ids)
> - return -EINVAL;
> -
> cur_vmsa = per_cpu(sev_vmsa, cpu);
>
> /*
> diff --git a/arch/x86/hyperv/hv_vtl.c b/arch/x86/hyperv/hv_vtl.c
> index 2f32ac1ae40e..3d149a2ca4c8 100644
> --- a/arch/x86/hyperv/hv_vtl.c
> +++ b/arch/x86/hyperv/hv_vtl.c
> @@ -211,17 +211,9 @@ static int hv_vtl_bringup_vcpu(u32 target_vp_index, int cpu, u64 eip_ignored)
> return ret;
> }
>
> -static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip)
> +static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip, unsigned int cpu)
> {
> - int vp_index, cpu;
> -
> - /* Find the logical CPU for the APIC ID */
> - for_each_present_cpu(cpu) {
> - if (arch_match_cpu_phys_id(cpu, apicid))
> - break;
> - }
> - if (cpu >= nr_cpu_ids)
> - return -EINVAL;
> + int vp_index;
>
> pr_debug("Bringing up CPU with APIC ID %d in VTL2...\n", apicid);
> vp_index = hv_apicid_to_vp_index(apicid);
> diff --git a/arch/x86/hyperv/ivm.c b/arch/x86/hyperv/ivm.c
> index 0cc239cdb4da..e21557b24d19 100644
> --- a/arch/x86/hyperv/ivm.c
> +++ b/arch/x86/hyperv/ivm.c
> @@ -289,7 +289,7 @@ static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa)
> free_page((unsigned long)vmsa);
> }
>
> -int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip)
> +int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu)
> {
> struct sev_es_save_area *vmsa = (struct sev_es_save_area *)
> __get_free_page(GFP_KERNEL | __GFP_ZERO);
> @@ -298,7 +298,7 @@ int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip)
> u64 ret, retry = 5;
> struct hv_enable_vp_vtl *start_vp_input;
> unsigned long flags;
> - int cpu, vp_index;
> + int vp_index;
>
> if (!vmsa)
> return -ENOMEM;
> @@ -308,17 +308,6 @@ int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip)
> if (vp_index < 0 || vp_index > ms_hyperv.max_vp_index)
> return -EINVAL;
>
> - /*
> - * Find the Linux CPU number for addressing the per-CPU data, and it
> - * might not be the same as APIC ID.
> - */
> - for_each_present_cpu(cpu) {
> - if (arch_match_cpu_phys_id(cpu, apic_id))
> - break;
> - }
> - if (cpu >= nr_cpu_ids)
> - return -EINVAL;
> -
> native_store_gdt(&gdtr);
>
> vmsa->gdtr.base = gdtr.address;
> diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
> index c903d358405d..eaf43d446203 100644
> --- a/arch/x86/include/asm/apic.h
> +++ b/arch/x86/include/asm/apic.h
> @@ -313,9 +313,9 @@ struct apic {
> u32 (*get_apic_id)(u32 id);
>
> /* wakeup_secondary_cpu */
> - int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip, unsigned int cpu);
> /* wakeup secondary CPU using 64-bit wakeup point */
> - int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip, unsigned int cpu);
>
> char *name;
> };
> @@ -333,8 +333,8 @@ struct apic_override {
> void (*send_IPI_self)(int vector);
> u64 (*icr_read)(void);
> void (*icr_write)(u32 low, u32 high);
> - int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
> - int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
> + int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip, unsigned int cpu);
> + int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip, unsigned int cpu);
> };
>
> /*
> diff --git a/arch/x86/include/asm/mshyperv.h b/arch/x86/include/asm/mshyperv.h
> index 0b9a3a307d06..5ec92e3e2e37 100644
> --- a/arch/x86/include/asm/mshyperv.h
> +++ b/arch/x86/include/asm/mshyperv.h
> @@ -268,11 +268,12 @@ int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
> #ifdef CONFIG_AMD_MEM_ENCRYPT
> bool hv_ghcb_negotiate_protocol(void);
> void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
> -int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip);
> +int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip, unsigned int cpu);
> #else
> static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
> static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
> -static inline int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip) { return 0; }
> +static inline int hv_snp_boot_ap(u32 apic_id, unsigned long start_ip,
> + unsigned int cpu) { return 0; }
> #endif
>
> #if defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST)
> diff --git a/arch/x86/kernel/acpi/madt_wakeup.c b/arch/x86/kernel/acpi/madt_wakeup.c
> index f36f28405dcc..6d7603511f52 100644
> --- a/arch/x86/kernel/acpi/madt_wakeup.c
> +++ b/arch/x86/kernel/acpi/madt_wakeup.c
> @@ -126,7 +126,7 @@ static int __init acpi_mp_setup_reset(u64 reset_vector)
> return 0;
> }
>
> -static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
> +static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip, unsigned int cpu)
> {
> if (!acpi_mp_wake_mailbox_paddr) {
> pr_warn_once("No MADT mailbox: cannot bringup secondary CPUs. Booting with kexec?\n");
> diff --git a/arch/x86/kernel/apic/apic_noop.c b/arch/x86/kernel/apic/apic_noop.c
> index b5bb7a2e8340..58abb941c45b 100644
> --- a/arch/x86/kernel/apic/apic_noop.c
> +++ b/arch/x86/kernel/apic/apic_noop.c
> @@ -27,7 +27,13 @@ static void noop_send_IPI_allbutself(int vector) { }
> static void noop_send_IPI_all(int vector) { }
> static void noop_send_IPI_self(int vector) { }
> static void noop_apic_icr_write(u32 low, u32 id) { }
> -static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { return -1; }
> +
> +static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip,
> + unsigned int cpu)
> +{
> + return -1;
> +}
> +
> static u64 noop_apic_icr_read(void) { return 0; }
> static u32 noop_get_apic_id(u32 apicid) { return 0; }
> static void noop_apic_eoi(void) { }
> diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
> index 16410f087b7a..333536b89bde 100644
> --- a/arch/x86/kernel/apic/apic_numachip.c
> +++ b/arch/x86/kernel/apic/apic_numachip.c
> @@ -56,7 +56,7 @@ static void numachip2_apic_icr_write(int apicid, unsigned int val)
> numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
> }
>
> -static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
> +static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip, unsigned int cpu)
> {
> numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
> numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |
> diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c
> index 7fef504ca508..15209f220e1f 100644
> --- a/arch/x86/kernel/apic/x2apic_uv_x.c
> +++ b/arch/x86/kernel/apic/x2apic_uv_x.c
> @@ -667,7 +667,7 @@ static __init void build_uv_gr_table(void)
> }
> }
>
> -static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
> +static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip, unsigned int cpu)
> {
> unsigned long val;
> int pnode;
> diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
> index d6cf1e23c2a3..d52e9238e9fd 100644
> --- a/arch/x86/kernel/smpboot.c
> +++ b/arch/x86/kernel/smpboot.c
> @@ -695,7 +695,7 @@ static void send_init_sequence(u32 phys_apicid)
> /*
> * Wake up AP by INIT, INIT, STARTUP sequence.
> */
> -static int wakeup_secondary_cpu_via_init(u32 phys_apicid, unsigned long start_eip)
> +static int wakeup_secondary_cpu_via_init(u32 phys_apicid, unsigned long start_eip, unsigned int cpu)
> {
> unsigned long send_status = 0, accept_status = 0;
> int num_starts, j, maxlvt;
> @@ -842,7 +842,7 @@ int common_cpu_up(unsigned int cpu, struct task_struct *idle)
> * Returns zero if startup was successfully sent, else error code from
> * ->wakeup_secondary_cpu.
> */
> -static int do_boot_cpu(u32 apicid, int cpu, struct task_struct *idle)
> +static int do_boot_cpu(u32 apicid, unsigned int cpu, struct task_struct *idle)
> {
> unsigned long start_ip = real_mode_header->trampoline_start;
> int ret;
> @@ -896,11 +896,11 @@ static int do_boot_cpu(u32 apicid, int cpu, struct task_struct *idle)
> * - Use an INIT boot APIC message
> */
> if (apic->wakeup_secondary_cpu_64)
> - ret = apic->wakeup_secondary_cpu_64(apicid, start_ip);
> + ret = apic->wakeup_secondary_cpu_64(apicid, start_ip, cpu);
> else if (apic->wakeup_secondary_cpu)
> - ret = apic->wakeup_secondary_cpu(apicid, start_ip);
> + ret = apic->wakeup_secondary_cpu(apicid, start_ip, cpu);
> else
> - ret = wakeup_secondary_cpu_via_init(apicid, start_ip);
> + ret = wakeup_secondary_cpu_via_init(apicid, start_ip, cpu);
>
> /* If the wakeup mechanism failed, cleanup the warm reset vector */
> if (ret)
> --
> 2.43.0
>
Powered by blists - more mailing lists